1 /* 2 * Copyright (c) 2006-2018, RT-Thread Development Team 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 * 6 * Change Logs: 7 * Date Author Notes 8 * 2023-5-22 Rain Park first version 9 */ 10 11 #include <board.h> 12 #include <drv_common.h> 13 SystemClock_Config(void)14void SystemClock_Config(void) 15 { 16 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 17 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 18 19 /** Configure the main internal regulator output voltage 20 */ 21 if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) 22 { 23 Error_Handler(); 24 } 25 26 /** Configure LSE Drive Capability 27 */ 28 HAL_PWR_EnableBkUpAccess(); 29 __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW); 30 31 /** Initializes the RCC Oscillators according to the specified parameters 32 * in the RCC_OscInitTypeDef structure. 33 */ 34 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE|RCC_OSCILLATORTYPE_MSI; 35 RCC_OscInitStruct.LSEState = RCC_LSE_ON; 36 RCC_OscInitStruct.MSIState = RCC_MSI_ON; 37 RCC_OscInitStruct.MSICalibrationValue = 0; 38 RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_9; 39 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 40 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI; 41 RCC_OscInitStruct.PLL.PLLM = 5; 42 RCC_OscInitStruct.PLL.PLLN = 71; 43 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; 44 RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; 45 RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV6; 46 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 47 { 48 Error_Handler(); 49 } 50 51 /** Initializes the CPU, AHB and APB buses clocks 52 */ 53 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 54 |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; 55 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 56 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV4; 57 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; 58 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 59 60 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) 61 { 62 Error_Handler(); 63 } 64 65 /** Enable MSI Auto calibration 66 */ 67 HAL_RCCEx_EnableMSIPLLMode(); 68 } 69