1 /* 2 * Copyright (c) 2006-2021, RT-Thread Development Team 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 * 6 * Date Author Notes 7 * 2020-07-02 thread-liu first version 8 */ 9 10 #ifndef __DRV_CS42L51_H__ 11 #define __DRV_CS42L51_H__ 12 13 #ifdef __cplusplus 14 extern "C" { 15 #endif 16 17 typedef struct 18 { 19 rt_err_t (*init)(uint16_t , const char *, uint8_t); 20 void (*deinit)(void); 21 uint32_t (*read_id)(void); 22 uint32_t (*play)(void); 23 uint32_t (*pause)(void); 24 uint32_t (*resume)(void); 25 uint32_t (*stop)(void); 26 uint32_t (*set_frequency)(uint32_t); 27 uint32_t (*set_volume)(uint8_t); 28 uint32_t (*get_volume)(void); 29 uint32_t (*set_mute)(uint32_t); 30 uint32_t (*set_output_mode)(uint8_t); 31 uint32_t (*reset)(void); 32 }AUDIO_DrvTypeDef; 33 34 extern AUDIO_DrvTypeDef cs42l51_drv; 35 36 /* CS42L51 register space */ 37 #define CS42L51_CHIP_ID 0x1B 38 #define CS42L51_CHIP_REV_A 0x00 39 #define CS42L51_CHIP_REV_B 0x01 40 41 #define CS42L51_CHIP_REV_ID 0x01 42 #define CS42L51_MK_CHIP_REV(a, b) ((a)<<3|(b)) 43 44 #define CS42L51_POWER_CTL1 0x02 45 #define CS42L51_POWER_CTL1_PDN_DACB (1<<6) 46 #define CS42L51_POWER_CTL1_PDN_DACA (1<<5) 47 #define CS42L51_POWER_CTL1_PDN_PGAB (1<<4) 48 #define CS42L51_POWER_CTL1_PDN_PGAA (1<<3) 49 #define CS42L51_POWER_CTL1_PDN_ADCB (1<<2) 50 #define CS42L51_POWER_CTL1_PDN_ADCA (1<<1) 51 #define CS42L51_POWER_CTL1_PDN (1<<0) 52 53 #define CS42L51_MIC_POWER_CTL 0x03 54 #define CS42L51_MIC_POWER_CTL_AUTO (1<<7) 55 #define CS42L51_MIC_POWER_CTL_SPEED(x) (((x)&3)<<5) 56 #define CS42L51_QSM_MODE 3 57 #define CS42L51_HSM_MODE 2 58 #define CS42L51_SSM_MODE 1 59 #define CS42L51_DSM_MODE 0 60 #define CS42L51_MIC_POWER_CTL_3ST_SP (1<<4) 61 #define CS42L51_MIC_POWER_CTL_PDN_MICB (1<<3) 62 #define CS42L51_MIC_POWER_CTL_PDN_MICA (1<<2) 63 #define CS42L51_MIC_POWER_CTL_PDN_BIAS (1<<1) 64 #define CS42L51_MIC_POWER_CTL_MCLK_DIV2 (1<<0) 65 66 #define CS42L51_INTF_CTL 0x04 67 #define CS42L51_INTF_CTL_LOOPBACK (1<<7) 68 #define CS42L51_INTF_CTL_MASTER (1<<6) 69 #define CS42L51_INTF_CTL_DAC_FORMAT(x) (((x)&7)<<3) 70 #define CS42L51_DAC_DIF_LJ24 0x00 71 #define CS42L51_DAC_DIF_I2S 0x01 72 #define CS42L51_DAC_DIF_RJ24 0x02 73 #define CS42L51_DAC_DIF_RJ20 0x03 74 #define CS42L51_DAC_DIF_RJ18 0x04 75 #define CS42L51_DAC_DIF_RJ16 0x05 76 #define CS42L51_INTF_CTL_ADC_I2S (1<<2) 77 #define CS42L51_INTF_CTL_DIGMIX (1<<1) 78 #define CS42L51_INTF_CTL_MICMIX (1<<0) 79 80 #define CS42L51_MIC_CTL 0x05 81 #define CS42L51_MIC_CTL_ADC_SNGVOL (1<<7) 82 #define CS42L51_MIC_CTL_ADCD_DBOOST (1<<6) 83 #define CS42L51_MIC_CTL_ADCA_DBOOST (1<<5) 84 #define CS42L51_MIC_CTL_MICBIAS_SEL (1<<4) 85 #define CS42L51_MIC_CTL_MICBIAS_LVL(x) (((x)&3)<<2) 86 #define CS42L51_MIC_CTL_MICB_BOOST (1<<1) 87 #define CS42L51_MIC_CTL_MICA_BOOST (1<<0) 88 89 #define CS42L51_ADC_CTL 0x06 90 #define CS42L51_ADC_CTL_ADCB_HPFEN (1<<7) 91 #define CS42L51_ADC_CTL_ADCB_HPFRZ (1<<6) 92 #define CS42L51_ADC_CTL_ADCA_HPFEN (1<<5) 93 #define CS42L51_ADC_CTL_ADCA_HPFRZ (1<<4) 94 #define CS42L51_ADC_CTL_SOFTB (1<<3) 95 #define CS42L51_ADC_CTL_ZCROSSB (1<<2) 96 #define CS42L51_ADC_CTL_SOFTA (1<<1) 97 #define CS42L51_ADC_CTL_ZCROSSA (1<<0) 98 99 #define CS42L51_ADC_INPUT 0x07 100 #define CS42L51_ADC_INPUT_AINB_MUX(x) (((x)&3)<<6) 101 #define CS42L51_ADC_INPUT_AINA_MUX(x) (((x)&3)<<4) 102 #define CS42L51_ADC_INPUT_INV_ADCB (1<<3) 103 #define CS42L51_ADC_INPUT_INV_ADCA (1<<2) 104 #define CS42L51_ADC_INPUT_ADCB_MUTE (1<<1) 105 #define CS42L51_ADC_INPUT_ADCA_MUTE (1<<0) 106 107 #define CS42L51_DAC_OUT_CTL 0x08 108 #define CS42L51_DAC_OUT_CTL_HP_GAIN(x) (((x)&7)<<5) 109 #define CS42L51_DAC_OUT_CTL_DAC_SNGVOL (1<<4) 110 #define CS42L51_DAC_OUT_CTL_INV_PCMB (1<<3) 111 #define CS42L51_DAC_OUT_CTL_INV_PCMA (1<<2) 112 #define CS42L51_DAC_OUT_CTL_DACB_MUTE (1<<1) 113 #define CS42L51_DAC_OUT_CTL_DACA_MUTE (1<<0) 114 115 #define CS42L51_DAC_CTL 0x09 116 #define CS42L51_DAC_CTL_DATA_SEL(x) (((x)&3)<<6) 117 #define CS42L51_DAC_CTL_FREEZE (1<<5) 118 #define CS42L51_DAC_CTL_DEEMPH (1<<3) 119 #define CS42L51_DAC_CTL_AMUTE (1<<2) 120 #define CS42L51_DAC_CTL_DACSZ(x) (((x)&3)<<0) 121 122 #define CS42L51_ALC_PGA_CTL 0x0A 123 #define CS42L51_ALC_PGB_CTL 0x0B 124 #define CS42L51_ALC_PGX_ALCX_SRDIS (1<<7) 125 #define CS42L51_ALC_PGX_ALCX_ZCDIS (1<<6) 126 #define CS42L51_ALC_PGX_PGX_VOL(x) (((x)&0x1f)<<0) 127 128 #define CS42L51_ADCA_ATT 0x0C 129 #define CS42L51_ADCB_ATT 0x0D 130 131 #define CS42L51_ADCA_VOL 0x0E 132 #define CS42L51_ADCB_VOL 0x0F 133 #define CS42L51_PCMA_VOL 0x10 134 #define CS42L51_PCMB_VOL 0x11 135 #define CS42L51_MIX_MUTE_ADCMIX (1<<7) 136 #define CS42L51_MIX_VOLUME(x) (((x)&0x7f)<<0) 137 138 #define CS42L51_BEEP_FREQ 0x12 139 #define CS42L51_BEEP_VOL 0x13 140 #define CS42L51_BEEP_CONF 0x14 141 142 #define CS42L51_TONE_CTL 0x15 143 #define CS42L51_TONE_CTL_TREB(x) (((x)&0xf)<<4) 144 #define CS42L51_TONE_CTL_BASS(x) (((x)&0xf)<<0) 145 146 #define CS42L51_AOUTA_VOL 0x16 147 #define CS42L51_AOUTB_VOL 0x17 148 #define CS42L51_PCM_MIXER 0x18 149 #define CS42L51_LIMIT_THRES_DIS 0x19 150 #define CS42L51_LIMIT_REL 0x1A 151 #define CS42L51_LIMIT_ATT 0x1B 152 #define CS42L51_ALC_EN 0x1C 153 #define CS42L51_ALC_REL 0x1D 154 #define CS42L51_ALC_THRES 0x1E 155 #define CS42L51_NOISE_CONF 0x1F 156 157 #define CS42L51_STATUS 0x20 158 #define CS42L51_STATUS_SP_CLKERR (1<<6) 159 #define CS42L51_STATUS_SPEA_OVFL (1<<5) 160 #define CS42L51_STATUS_SPEB_OVFL (1<<4) 161 #define CS42L51_STATUS_PCMA_OVFL (1<<3) 162 #define CS42L51_STATUS_PCMB_OVFL (1<<2) 163 #define CS42L51_STATUS_ADCA_OVFL (1<<1) 164 #define CS42L51_STATUS_ADCB_OVFL (1<<0) 165 166 #define CS42L51_CHARGE_FREQ 0x21 167 #define CS42L51_FIRSTREG 0x01 168 169 enum play_type { 170 NONE, 171 OUT_HEADPHONE, 172 IN_MIC1, 173 IN_MIC2, 174 IN_LINE1, 175 IN_LINE2, 176 IN_LINE3, 177 }; 178 179 /* 180 * Hack: with register 0x21, it makes 33 registers. Looks like someone in the 181 * i2c layer doesn't like i2c smbus block read of 33 regs. Workaround by using 182 * 32 regs 183 */ 184 #define CS42L51_LASTREG 0x20 185 #define CS42L51_NUMREGS (CS42L51_LASTREG - CS42L51_FIRSTREG + 1) 186 187 #define VOLUME_CONVERT(Volume) ((Volume >= 100) ? 0 : ((uint8_t)(((Volume * 2) + 56)))) 188 #define VOLUME_INVERT(Volume) (((Volume) == 0U) ? 100U : ((uint8_t)(((Volume) - 56U) / 2U))) 189 190 /* MUTE commands */ 191 #define AUDIO_MUTE_ON 1 192 #define AUDIO_MUTE_OFF 0 193 194 #ifdef __cplusplus 195 } 196 #endif 197 198 #endif 199