1 /*
2  * Copyright (c) 2006-2021, RT-Thread Development Team
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  *
6  * Change Logs:
7  * Date           Author       Notes
8  * 2020-00-30     thread-liu   first version
9  */
10 
11 #ifndef __DRV_NAND_H__
12 #define __DRV_NAND_H__
13 
14 #include "board.h"
15 
16 #ifdef __cplusplus
17 extern "C"
18 {
19 #endif
20 
21 #define NAND_MAX_PAGE_SIZE              4096
22 #define NAND_ECC_SECTOR_SIZE            512
23 
24 #define NAND_TWHR_DELAY                 25
25 #define NAND_TBERS_DELAY                4
26 
27 #define MT29F8G08ABACAH4                0x64A690D3 /* id */
28 
29 #define NAND_ADDR                       ((rt_uint32_t)0x80000000) /* nand base address */
30 #define NAND_ADDR_AREA                  (*(__IO rt_uint8_t *)NAND_ADDR)
31 #define NAND_CMD_AREA                   (*(__IO rt_uint8_t *)(NAND_ADDR | 1 << 16))  /*  command */
32 #define NAND_DATA_AREA                  (*(__IO rt_uint8_t *)(NAND_ADDR | 1 << 17)) /*  data */
33 
34 /* nand flash command */
35 #define NAND_READID                     0x90
36 #define NAND_FEATURE                    0xEF
37 #define NAND_RESET                      0xFF
38 #define NAND_READSTA                    0x70
39 #define NAND_AREA_A                     0x00
40 #define NAND_AREA_TRUE1                 0x30
41 #define NAND_WRITE0                     0x80
42 #define NAND_WRITE_TURE1                0x10
43 #define NAND_ERASE0                     0x60
44 #define NAND_ERASE1                     0xD0
45 #define NAND_MOVEDATA_CMD0              0x00
46 #define NAND_MOVEDATA_CMD1              0x35
47 #define NAND_MOVEDATA_CMD2              0x85
48 #define NAND_MOVEDATA_CMD3              0x10
49 
50 /* nand flash status */
51 #define NAND_READY                      0x40 /* read */
52 #define NAND_ECC1BITERR                 0x03 /* ECC 1bit err */
53 #define NAND_ECC2BITERR                 0x04 /* ECC 2bit or more err */
54 
55 #ifdef __cplusplus
56 }
57 #endif
58 
59 #endif
60