1 /* 2 * Copyright (c) 2006-2021, RT-Thread Development Team 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 * 6 * Change Logs: 7 * Date Author Notes 8 * 2018-11-06 SummerGift first version 9 * 2021-03-27 xph open rtc clk to support ble stack 10 */ 11 12 #include "board.h" 13 SystemClock_Config(void)14void SystemClock_Config(void) 15 { 16 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 17 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 18 RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; 19 20 /** Configure LSE Drive Capability 21 */ 22 HAL_PWR_EnableBkUpAccess(); 23 __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW); 24 /** Configure the main internal regulator output voltage 25 */ 26 __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); 27 /** Initializes the RCC Oscillators according to the specified parameters 28 * in the RCC_OscInitTypeDef structure. 29 */ 30 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_LSI1 | RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_MSI; 31 RCC_OscInitStruct.HSEState = RCC_HSE_ON; 32 RCC_OscInitStruct.LSEState = RCC_LSE_ON; 33 RCC_OscInitStruct.HSIState = RCC_HSI_ON; 34 RCC_OscInitStruct.MSIState = RCC_MSI_ON; 35 RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; 36 RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT; 37 RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6; 38 RCC_OscInitStruct.LSIState = RCC_LSI_ON; 39 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 40 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI; 41 RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV1; 42 RCC_OscInitStruct.PLL.PLLN = 32; 43 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; 44 RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; 45 RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; 46 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 47 { 48 Error_Handler(); 49 } 50 /** Configure the SYSCLKSource, HCLK, PCLK1 and PCLK2 clocks dividers 51 */ 52 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK4 | RCC_CLOCKTYPE_HCLK2 | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; 53 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 54 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 55 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; 56 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 57 RCC_ClkInitStruct.AHBCLK2Divider = RCC_SYSCLK_DIV2; 58 RCC_ClkInitStruct.AHBCLK4Divider = RCC_SYSCLK_DIV1; 59 60 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) 61 { 62 Error_Handler(); 63 } 64 PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SMPS | RCC_PERIPHCLK_RFWAKEUP | RCC_PERIPHCLK_RTC | RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_LPUART1; 65 PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; 66 PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK1; 67 PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE; 68 PeriphClkInitStruct.RFWakeUpClockSelection = RCC_RFWKPCLKSOURCE_LSE; 69 PeriphClkInitStruct.SmpsClockSelection = RCC_SMPSCLKSOURCE_HSE; 70 PeriphClkInitStruct.SmpsDivSelection = RCC_SMPSCLKDIV_RANGE1; 71 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) 72 { 73 Error_Handler(); 74 } 75 /* USER CODE BEGIN Smps */ 76 77 /* USER CODE END Smps */ 78 /** Enable MSI Auto calibration 79 */ 80 HAL_RCCEx_EnableMSIPLLMode(); 81 } 82