1/******************************************************************************
2 * @file     gcc_arm.ld
3 * @brief    GNU Linker Script for Cortex-M based device
4 * @version  V2.0.0
5 * @date     21. May 2019
6 ******************************************************************************/
7/*
8 * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
9 *
10 * SPDX-License-Identifier: Apache-2.0
11 *
12 * Licensed under the Apache License, Version 2.0 (the License); you may
13 * not use this file except in compliance with the License.
14 * You may obtain a copy of the License at
15 *
16 * www.apache.org/licenses/LICENSE-2.0
17 *
18 * Unless required by applicable law or agreed to in writing, software
19 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
20 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
21 * See the License for the specific language governing permissions and
22 * limitations under the License.
23 */
24
25/*
26 *-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
27 */
28
29/*---------------------- Flash Configuration ----------------------------------
30  <h> Flash Configuration
31    <o0> Flash Base Address <0x0-0xFFFFFFFF:8>
32    <o1> Flash Size (in Bytes) <0x0-0xFFFFFFFF:8>
33  </h>
34  -----------------------------------------------------------------------------*/
35__ROM_BASE = 0x00000000;
36__ROM_SIZE = 0x00040000;
37
38/*--------------------- Embedded RAM Configuration ----------------------------
39  <h> RAM Configuration
40    <o0> RAM Base Address    <0x0-0xFFFFFFFF:8>
41    <o1> RAM Size (in Bytes) <0x0-0xFFFFFFFF:8>
42  </h>
43 -----------------------------------------------------------------------------*/
44__RAM_BASE = 0x20000000;
45__RAM_SIZE = 0x00020000;
46
47/*--------------------- Stack / Heap Configuration ----------------------------
48  <h> Stack / Heap Configuration
49    <o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
50    <o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
51  </h>
52  -----------------------------------------------------------------------------*/
53__STACK_SIZE = 0x00000400;
54__HEAP_SIZE  = 0x00000C00;
55
56/*
57 *-------------------- <<< end of configuration section >>> -------------------
58 */
59
60MEMORY
61{
62  FLASH (rx)  : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE
63  RAM   (rwx) : ORIGIN = __RAM_BASE, LENGTH = __RAM_SIZE
64}
65
66/* Linker script to place sections and symbol values. Should be used together
67 * with other linker script that defines memory regions FLASH and RAM.
68 * It references following symbols, which must be defined in code:
69 *   Reset_Handler : Entry of reset handler
70 *
71 * It defines following symbols, which code can use without definition:
72 *   __exidx_start
73 *   __exidx_end
74 *   __copy_table_start__
75 *   __copy_table_end__
76 *   __zero_table_start__
77 *   __zero_table_end__
78 *   __etext
79 *   __data_start__
80 *   __preinit_array_start
81 *   __preinit_array_end
82 *   __init_array_start
83 *   __init_array_end
84 *   __fini_array_start
85 *   __fini_array_end
86 *   __data_end__
87 *   __bss_start__
88 *   __bss_end__
89 *   __end__
90 *   end
91 *   __HeapLimit
92 *   __StackLimit
93 *   __StackTop
94 *   __stack
95 */
96ENTRY(Reset_Handler)
97
98SECTIONS
99{
100  .text :
101  {
102    KEEP(*(.vectors))
103    *(.text*)
104
105    KEEP(*(.init))
106    KEEP(*(.fini))
107
108    /* .ctors */
109    *crtbegin.o(.ctors)
110    *crtbegin?.o(.ctors)
111    *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
112    *(SORT(.ctors.*))
113    *(.ctors)
114
115    /* .dtors */
116    *crtbegin.o(.dtors)
117    *crtbegin?.o(.dtors)
118    *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
119    *(SORT(.dtors.*))
120    *(.dtors)
121
122    *(.rodata*)
123
124    KEEP(*(.eh_frame*))
125  } > FLASH
126
127  /*
128   * SG veneers:
129   * All SG veneers are placed in the special output section .gnu.sgstubs. Its start address
130   * must be set, either with the command line option �--section-start� or in a linker script,
131   * to indicate where to place these veneers in memory.
132   */
133/*
134  .gnu.sgstubs :
135  {
136    . = ALIGN(32);
137  } > FLASH
138*/
139  .ARM.extab :
140  {
141    *(.ARM.extab* .gnu.linkonce.armextab.*)
142  } > FLASH
143
144  __exidx_start = .;
145  .ARM.exidx :
146  {
147    *(.ARM.exidx* .gnu.linkonce.armexidx.*)
148  } > FLASH
149  __exidx_end = .;
150
151  .copy.table :
152  {
153    . = ALIGN(4);
154    __copy_table_start__ = .;
155    LONG (__etext)
156    LONG (__data_start__)
157    LONG (__data_end__ - __data_start__)
158    /* Add each additional data section here */
159/*
160    LONG (__etext2)
161    LONG (__data2_start__)
162    LONG (__data2_end__ - __data2_start__)
163*/
164    __copy_table_end__ = .;
165  } > FLASH
166
167  .zero.table :
168  {
169    . = ALIGN(4);
170    __zero_table_start__ = .;
171    /* Add each additional bss section here */
172/*
173    LONG (__bss2_start__)
174    LONG (__bss2_end__ - __bss2_start__)
175*/
176    __zero_table_end__ = .;
177  } > FLASH
178
179  /**
180   * Location counter can end up 2byte aligned with narrow Thumb code but
181   * __etext is assumed by startup code to be the LMA of a section in RAM
182   * which must be 4byte aligned
183   */
184  __etext = ALIGN (4);
185
186  .data : AT (__etext)
187  {
188    __data_start__ = .;
189    *(vtable)
190    *(.data)
191    *(.data.*)
192
193    . = ALIGN(4);
194    /* preinit data */
195    PROVIDE_HIDDEN (__preinit_array_start = .);
196    KEEP(*(.preinit_array))
197    PROVIDE_HIDDEN (__preinit_array_end = .);
198
199    . = ALIGN(4);
200    /* init data */
201    PROVIDE_HIDDEN (__init_array_start = .);
202    KEEP(*(SORT(.init_array.*)))
203    KEEP(*(.init_array))
204    PROVIDE_HIDDEN (__init_array_end = .);
205
206
207    . = ALIGN(4);
208    /* finit data */
209    PROVIDE_HIDDEN (__fini_array_start = .);
210    KEEP(*(SORT(.fini_array.*)))
211    KEEP(*(.fini_array))
212    PROVIDE_HIDDEN (__fini_array_end = .);
213
214    KEEP(*(.jcr*))
215    . = ALIGN(4);
216    /* All data end */
217    __data_end__ = .;
218
219  } > RAM
220
221  /*
222   * Secondary data section, optional
223   *
224   * Remember to add each additional data section
225   * to the .copy.table above to asure proper
226   * initialization during startup.
227   */
228/*
229  __etext2 = ALIGN (4);
230
231  .data2 : AT (__etext2)
232  {
233    . = ALIGN(4);
234    __data2_start__ = .;
235    *(.data2)
236    *(.data2.*)
237    . = ALIGN(4);
238    __data2_end__ = .;
239
240  } > RAM2
241*/
242
243  .bss :
244  {
245    . = ALIGN(4);
246    __bss_start__ = .;
247    *(.bss)
248    *(.bss.*)
249    *(COMMON)
250    . = ALIGN(4);
251    __bss_end__ = .;
252  } > RAM AT > RAM
253
254  /*
255   * Secondary bss section, optional
256   *
257   * Remember to add each additional bss section
258   * to the .zero.table above to asure proper
259   * initialization during startup.
260   */
261/*
262  .bss2 :
263  {
264    . = ALIGN(4);
265    __bss2_start__ = .;
266    *(.bss2)
267    *(.bss2.*)
268    . = ALIGN(4);
269    __bss2_end__ = .;
270  } > RAM2 AT > RAM2
271*/
272
273  .heap (COPY) :
274  {
275    . = ALIGN(8);
276    __end__ = .;
277    PROVIDE(end = .);
278    . = . + __HEAP_SIZE;
279    . = ALIGN(8);
280    __HeapLimit = .;
281  } > RAM
282
283  .stack (ORIGIN(RAM) + LENGTH(RAM) - __STACK_SIZE) (COPY) :
284  {
285    . = ALIGN(8);
286    __StackLimit = .;
287    . = . + __STACK_SIZE;
288    . = ALIGN(8);
289    __StackTop = .;
290  } > RAM
291  PROVIDE(__stack = __StackTop);
292
293  /* Check if data + heap + stack exceeds RAM limit */
294  ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
295}
296