1 /*
2  * Copyright (c) 2006-2019, RT-Thread Development Team
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  *
6  * Change Logs:
7  * Date           Author       Notes
8  * 2021-09-05     qinweizhong  add support for tae32
9  */
10 #include "board.h"
11 
12 #define _SCB_BASE       (0xE000E010UL)
13 #define _SYSTICK_CTRL   (*(rt_uint32_t *)(_SCB_BASE + 0x0))
14 #define _SYSTICK_LOAD   (*(rt_uint32_t *)(_SCB_BASE + 0x4))
15 #define _SYSTICK_VAL    (*(rt_uint32_t *)(_SCB_BASE + 0x8))
16 #define _SYSTICK_CALIB  (*(rt_uint32_t *)(_SCB_BASE + 0xC))
17 #define _SYSTICK_PRI    (*(rt_uint8_t  *)(0xE000ED23UL))
18 
_SysTick_Config(rt_uint32_t ticks)19 static uint32_t _SysTick_Config(rt_uint32_t ticks)
20 {
21     if ((ticks - 1) > 0xFFFFFF)
22     {
23         return 1;
24     }
25 
26     _SYSTICK_LOAD = ticks - 1;
27     _SYSTICK_PRI = 0x01;
28     _SYSTICK_VAL  = 0;
29     _SYSTICK_CTRL = 0x07;
30 
31     return 0;
32 }
33 
34 #if defined(RT_USING_USER_MAIN) && defined(RT_USING_HEAP)
35 #define RT_HEAP_SIZE 2048
36 static uint32_t rt_heap[RT_HEAP_SIZE];/* heap default size: 4K(1024 * 4)*/
rt_heap_begin_get(void)37 rt_weak void *rt_heap_begin_get(void)
38 {
39     return rt_heap;
40 }
41 
rt_heap_end_get(void)42 rt_weak void *rt_heap_end_get(void)
43 {
44     return rt_heap + RT_HEAP_SIZE;
45 }
46 #endif
47 
48 /**
49  * This function will initial your board.
50  */
rt_hw_board_init()51 void rt_hw_board_init()
52 {
53     /* System Clock Update */
54     SystemClock_Config();
55     /* System Tick Configuration */
56     LL_Init();
57     _SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
58 
59     /* Call components board initial (use INIT_BOARD_EXPORT()) */
60 #ifdef RT_USING_COMPONENTS_INIT
61     rt_components_board_init();
62 #endif
63 
64 #if defined(RT_USING_USER_MAIN) && defined(RT_USING_HEAP)
65     rt_system_heap_init(rt_heap_begin_get(), rt_heap_end_get());
66 #endif
67 #if defined(RT_USING_CONSOLE) && defined(RT_USING_DEVICE)
68     rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
69 #endif
70 }
71 
SysTick_Handler(void)72 void SysTick_Handler(void)
73 {
74     /* enter interrupt */
75     rt_interrupt_enter();
76 
77     rt_tick_increase();
78 
79     /* leave interrupt */
80     rt_interrupt_leave();
81 }
82 
rt_hw_console_output(const char * str)83 void rt_hw_console_output(const char *str)
84 {
85     rt_size_t i = 0, size = 0;
86     char a = '\r';
87 
88     size = rt_strlen(str);
89     for (i = 0; i < size; i++)
90     {
91         if (*(str + i) == '\n')
92         {
93             /*Wait TXFIFO to be no full*/
94             while (!__LL_UART_IsTxFIFONotFull(UART0)) {};
95 
96             /*Send data to UART*/
97             __LL_UART_TxBuf9bits_Write(UART0, (uint16_t)a);
98         }
99         while (!__LL_UART_IsTxFIFONotFull(UART0)) {};
100 
101         /*Send data to UART*/
102         __LL_UART_TxBuf9bits_Write(UART0, (uint16_t)(*(str + i)));
103     }
104 }
105 
rt_hw_console_getchar(void)106 char rt_hw_console_getchar(void)
107 {
108     /* note: ch default value < 0 */
109     int ch = -1;
110     if (__LL_UART_IsDatReady(UART0))
111     {
112         /* receive data */
113         ch = __LL_UART_RxBuf9bits_Read(UART0);
114     }
115     else
116     {
117         rt_thread_mdelay(10);
118     }
119     return ch;
120 }
121 
SystemClock_Config(void)122 void SystemClock_Config(void)
123 {
124     LL_StatusETypeDef ret;
125     SYSCTRL_SysclkUserCfgTypeDef sysclk_cfg;
126 
127     /*FPLL0 Init*/
128     LL_FPLL_Init(FPLL0);
129 
130     /*SYSCLK Clock Config*/
131     sysclk_cfg.sysclk_src = SYSCLK_SRC_PLL0DivClk;
132     sysclk_cfg.sysclk_freq = 90000000UL;
133     sysclk_cfg.pll0clk_src = PLLCLK_SRC_XOSC;
134     sysclk_cfg.pll0clk_src_freq = HSE_VALUE;
135     sysclk_cfg.apb0_clk_div = SYSCTRL_CLK_DIV_1;
136     sysclk_cfg.apb1_clk_div = SYSCTRL_CLK_DIV_1;
137     ret = LL_SYSCTRL_SysclkInit(SYSCTRL, &sysclk_cfg);
138 
139     if (ret == LL_OK)
140     {
141         SystemCoreClockUpdate(sysclk_cfg.sysclk_freq);
142     }
143 
144     /*eFlash Memory CLK Source and Div Config*/
145     LL_SYSCTRL_EFLASH_ClkCfg(EFLASH_CLK_SRC_PLL0DivClk, SYSCTRL_CLK_DIV_9);
146 }
147