1 /*
2 * Copyright (c) 2006-2021, RT-Thread Development Team
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Change Logs:
7 * Date Author Notes
8 * 2021-09-05 qinweizhong first version
9 */
10 #include <rtthread.h>
11 #include <rtdevice.h>
12 #include <rthw.h>
13 #include <tae32f53xx_ll_gpio.h>
14 #include <tae32f53xx_ll_cortex.h>
15 #include "drv_gpio.h"
16
17 #define TAE32_PIN(index, gpio, gpio_index) \
18 { \
19 0, GPIO##gpio, GPIO_PIN_##gpio_index \
20 }
21
22 #define TAE32_PIN_DEFAULT \
23 { \
24 -1, 0, 0 \
25 }
26
27 /* TAE32 GPIO driver */
28 struct pin_index
29 {
30 int index;
31 GPIO_TypeDef *gpio;
32 uint32_t pin;
33 };
34
35 static const struct pin_index _pin_map[] =
36 {
37 TAE32_PIN_DEFAULT,
38 TAE32_PIN_DEFAULT,
39 TAE32_PIN(2, C, 13),
40 TAE32_PIN(3, C, 14),
41 TAE32_PIN(4, C, 15),
42 TAE32_PIN_DEFAULT,
43 TAE32_PIN_DEFAULT,
44 TAE32_PIN_DEFAULT,
45 TAE32_PIN_DEFAULT,
46 TAE32_PIN_DEFAULT,
47 TAE32_PIN(10, A, 0),
48 TAE32_PIN(11, A, 1),
49 TAE32_PIN(12, A, 2),
50 TAE32_PIN(13, A, 3),
51 TAE32_PIN(14, A, 4),
52 TAE32_PIN(15, A, 5),
53 TAE32_PIN(16, A, 6),
54 TAE32_PIN(17, A, 7),
55 TAE32_PIN(18, B, 0),
56 TAE32_PIN(19, B, 1),
57 TAE32_PIN(20, B, 2),
58 TAE32_PIN(21, B, 10),
59 TAE32_PIN(22, B, 11),
60 TAE32_PIN_DEFAULT,
61 TAE32_PIN_DEFAULT,
62 TAE32_PIN(25, B, 12),
63 TAE32_PIN(26, B, 13),
64 TAE32_PIN(27, B, 14),
65 TAE32_PIN(28, B, 15),
66 TAE32_PIN(29, A, 8),
67 TAE32_PIN(30, A, 9),
68 TAE32_PIN(31, A, 10),
69 TAE32_PIN(32, A, 11),
70 TAE32_PIN(33, A, 12),
71 TAE32_PIN(34, A, 13),
72 TAE32_PIN_DEFAULT,
73 TAE32_PIN_DEFAULT,
74 TAE32_PIN(37, A, 14),
75 TAE32_PIN(38, A, 15),
76 TAE32_PIN(39, B, 3),
77 TAE32_PIN(40, B, 4),
78 TAE32_PIN(41, B, 5),
79 TAE32_PIN(42, B, 6),
80 TAE32_PIN(43, B, 7),
81 TAE32_PIN_DEFAULT,
82 TAE32_PIN(45, B, 8),
83 TAE32_PIN(46, B, 9),
84 TAE32_PIN_DEFAULT,
85 TAE32_PIN_DEFAULT,
86 };
87
88 #define ITEM_NUM(items) sizeof(items) / sizeof(items[0])
89
get_pin(uint8_t pin)90 const struct pin_index *get_pin(uint8_t pin)
91 {
92 const struct pin_index *index;
93
94 if (pin < ITEM_NUM(_pin_map))
95 {
96 index = &_pin_map[pin];
97 if (index->gpio == 0)
98 index = RT_NULL;
99 }
100 else
101 {
102 index = RT_NULL;
103 }
104 return index;
105 };
106
_pin_write(rt_device_t dev,rt_base_t pin,rt_uint8_t value)107 void _pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
108 {
109 const struct pin_index *index;
110
111 index = get_pin(pin);
112 if (index == RT_NULL)
113 {
114 return;
115 }
116 if (value == PIN_LOW)
117 {
118 LL_GPIO_WritePin(index->gpio, index->pin, GPIO_PIN_RESET);
119 }
120 else
121 {
122 LL_GPIO_WritePin(index->gpio, index->pin, GPIO_PIN_SET);
123 }
124 }
125
_pin_read(rt_device_t dev,rt_base_t pin)126 rt_ssize_t _pin_read(rt_device_t dev, rt_base_t pin)
127 {
128 rt_ssize_t value;
129 const struct pin_index *index;
130
131 value = PIN_LOW;
132 index = get_pin(pin);
133 if (index == RT_NULL)
134 {
135 return -RT_EINVAL;
136 }
137 if (LL_GPIO_ReadPin(index->gpio, index->pin) == GPIO_PIN_RESET)
138 {
139 value = PIN_LOW;
140 }
141 else
142 {
143 value = PIN_HIGH;
144 }
145 return value;
146 }
147
_pin_mode(rt_device_t dev,rt_base_t pin,rt_uint8_t mode)148 void _pin_mode(rt_device_t dev, rt_base_t pin, rt_uint8_t mode)
149 {
150 const struct pin_index *index;
151 GPIO_InitTypeDef GPIO_InitStructure;
152
153 index = get_pin(pin);
154 if (index == RT_NULL)
155 {
156 return;
157 }
158 /* Configure GPIO_InitStructure */
159 GPIO_InitStructure.Pin = index->pin;
160 GPIO_InitStructure.Mode = GPIO_MODE_OUTPUT;
161 GPIO_InitStructure.OType = GPIO_OTYPE_PP;
162 GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_LOW;
163 if (mode == PIN_MODE_OUTPUT)
164 {
165 /* output setting */
166 GPIO_InitStructure.Mode = GPIO_MODE_OUTPUT;
167 GPIO_InitStructure.OType = GPIO_OTYPE_PP;
168 }
169 else if (mode == PIN_MODE_OUTPUT_OD)
170 {
171 /* output setting: od. */
172 GPIO_InitStructure.Mode = GPIO_MODE_OUTPUT;
173 GPIO_InitStructure.OType = GPIO_OTYPE_OD;
174 }
175 else if (mode == PIN_MODE_INPUT)
176 {
177 /* input setting: not pull. */
178 GPIO_InitStructure.Mode = GPIO_MODE_INPUT;
179 }
180 else if (mode == PIN_MODE_INPUT_PULLUP)
181 {
182 /* input setting: pull up. */
183 GPIO_InitStructure.Pull = GPIO_PULLUP;
184 GPIO_InitStructure.Mode = GPIO_MODE_INPUT;
185 }
186 else
187 {
188 /* input setting:default. */
189 GPIO_InitStructure.Pull = GPIO_PULLDOWN;
190 GPIO_InitStructure.Mode = GPIO_MODE_INPUT;
191 }
192 LL_GPIO_Init(index->gpio, &GPIO_InitStructure);
193 }
194
_pin_attach_irq(struct rt_device * device,rt_base_t pin,rt_uint8_t mode,void (* hdr)(void * args),void * args)195 rt_err_t _pin_attach_irq(struct rt_device *device, rt_base_t pin,
196 rt_uint8_t mode, void (*hdr)(void *args), void *args)
197 {
198 return -RT_ERROR;
199 }
200
_pin_detach_irq(struct rt_device * device,rt_base_t pin)201 rt_err_t _pin_detach_irq(struct rt_device *device, rt_base_t pin)
202 {
203 return -RT_ERROR;
204 }
205
_pin_irq_enable(struct rt_device * device,rt_base_t pin,rt_uint8_t enabled)206 rt_err_t _pin_irq_enable(struct rt_device *device, rt_base_t pin,
207 rt_uint8_t enabled)
208 {
209 return -RT_ERROR;
210 }
211
212 const static struct rt_pin_ops _pin_ops =
213 {
214 _pin_mode,
215 _pin_write,
216 _pin_read,
217 _pin_attach_irq,
218 _pin_detach_irq,
219 _pin_irq_enable,
220 RT_NULL,
221 };
222
rt_hw_pin_init(void)223 int rt_hw_pin_init(void)
224 {
225 int result;
226
227 result = rt_device_pin_register("pin", &_pin_ops, RT_NULL);
228 return result;
229 }
230 INIT_BOARD_EXPORT(rt_hw_pin_init);
231