1 //###########################################################################
2 //
3 // FILE:   F2837xD_Cla_defines.h
4 //
5 // TITLE:  #defines used in CLA examples
6 //
7 //###########################################################################
8 // $TI Release: F2837xD Support Library v3.05.00.00 $
9 // $Release Date: Tue Jun 26 03:15:23 CDT 2018 $
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41 //###########################################################################
42 
43 #ifndef F2837xD_CLA_DEFINES_H
44 #define F2837xD_CLA_DEFINES_H
45 
46 #ifdef __cplusplus
47 extern "C" {
48 #endif
49 
50 //
51 // Defines
52 //
53 
54 //
55 // MCTL Register
56 //
57 #define CLA_FORCE_RESET           0x1
58 #define CLA_IACK_ENABLE           0x1
59 #define CLA_IACK_DISABLE          0x0
60 
61 //
62 // MMEMCFG Register
63 //
64 #define CLA_CLA_SPACE             0x1
65 #define CLA_CPU_SPACE             0x0
66 
67 //
68 // MIER Interrupt Enable Register
69 //
70 #define CLA_INT_ENABLE            0x1
71 #define CLA_INT_DISABLE           0x0
72 
73 //
74 // Peripheral Interrupt Source Select define for DMAnCLASourceSelect Register
75 //
76 #define CLA_TRIG_NOPERPH	 0
77 #define CLA_TRIG_ADCAINT1    1
78 #define CLA_TRIG_ADCAINT2    2
79 #define CLA_TRIG_ADCAINT3    3
80 #define CLA_TRIG_ADCAINT4    4
81 #define CLA_TRIG_ADCAEVT     5
82 #define CLA_TRIG_ADCBINT1    6
83 #define CLA_TRIG_ADCBINT2    7
84 #define CLA_TRIG_ADCBINT3    8
85 #define CLA_TRIG_ADCBINT4    9
86 #define CLA_TRIG_ADCBEVT     10
87 #define CLA_TRIG_ADCCINT1    11
88 #define CLA_TRIG_ADCCINT2    12
89 #define CLA_TRIG_ADCCINT3    13
90 #define CLA_TRIG_ADCCINT4    14
91 #define CLA_TRIG_ADCCEVT     15
92 #define CLA_TRIG_ADCDINT1    16
93 #define CLA_TRIG_ADCDINT2    17
94 #define CLA_TRIG_ADCDINT3    18
95 #define CLA_TRIG_ADCDINT4    19
96 #define CLA_TRIG_ADCDEVT     20
97 
98 #define CLA_TRIG_XINT1   	29
99 #define CLA_TRIG_XINT2   	30
100 #define CLA_TRIG_XINT3   	31
101 #define CLA_TRIG_XINT4   	32
102 #define CLA_TRIG_XINT5   	33
103 
104 #define CLA_TRIG_EPWM1INT  	36
105 #define CLA_TRIG_EPWM2INT  	37
106 #define CLA_TRIG_EPWM3INT  	38
107 #define CLA_TRIG_EPWM4INT  	39
108 #define CLA_TRIG_EPWM5INT  	40
109 #define CLA_TRIG_EPWM6INT  	41
110 #define CLA_TRIG_EPWM7INT  	42
111 #define CLA_TRIG_EPWM8INT  	43
112 #define CLA_TRIG_EPWM9INT  	44
113 #define CLA_TRIG_EPWM10INT  45
114 #define CLA_TRIG_EPWM11INT  46
115 #define CLA_TRIG_EPWM12INT  47
116 
117 #define CLA_TRIG_TINT0   	68
118 #define CLA_TRIG_TINT1   	69
119 #define CLA_TRIG_TINT2   	70
120 
121 #define CLA_TRIG_MXEVTA  	71
122 #define CLA_TRIG_MREVTA  	72
123 #define CLA_TRIG_MXEVTB  	73
124 #define CLA_TRIG_MREVTB  	74
125 
126 #define CLA_TRIG_ECAP1INT   75
127 #define CLA_TRIG_ECAP2INT   76
128 #define CLA_TRIG_ECAP3INT   77
129 #define CLA_TRIG_ECAP4INT   78
130 #define CLA_TRIG_ECAP5INT   79
131 #define CLA_TRIG_ECAP6INT   80
132 
133 #define CLA_TRIG_EQEP1INT 	83
134 #define CLA_TRIG_EQEP2INT   84
135 #define CLA_TRIG_EQEP3INT   85
136 
137 #define CLA_TRIG_HRCAP1INT  87
138 #define CLA_TRIG_HRCAP2INT  88
139 
140 #define CLA_TRIG_SD1INT		95
141 #define CLA_TRIG_SD2INT     96
142 
143 #define CLA_TRIG_UPP1_INT   107
144 
145 #define CLA_TRIG_SPITXINTA  109
146 #define CLA_TRIG_SPIRXINTA	110
147 #define CLA_TRIG_SPITXINTB	111
148 #define CLA_TRIG_SPIRXINTB	112
149 #define CLA_TRIG_SPITXINTC	113
150 #define CLA_TRIG_SPIRXINTC	114
151 
152 #define Cla1ForceTask1andWait()asm("  IACK  #0x0001");             \
153                                asm("  RPT #3 || NOP");             \
154                                 while(Cla1Regs.MIRUN.bit.INT1 == 1);
155 
156 #define Cla1ForceTask2andWait()asm("  IACK  #0x0002");             \
157                                asm("  RPT #3 || NOP");             \
158                                 while(Cla1Regs.MIRUN.bit.INT2 == 1);
159 
160 #define Cla1ForceTask3andWait()asm("  IACK  #0x0004");             \
161                                asm("  RPT #3 || NOP");             \
162                                 while(Cla1Regs.MIRUN.bit.INT3 == 1);
163 
164 #define Cla1ForceTask4andWait()asm("  IACK  #0x0008");             \
165                                asm("  RPT #3 || NOP");             \
166                                 while(Cla1Regs.MIRUN.bit.INT4 == 1);
167 
168 #define Cla1ForceTask5andWait()asm("  IACK  #0x0010");             \
169                                asm("  RPT #3 || NOP");             \
170                                 while(Cla1Regs.MIRUN.bit.INT5 == 1);
171 
172 #define Cla1ForceTask6andWait()asm("  IACK  #0x0020");             \
173                                asm("  RPT #3 || NOP");             \
174                                 while(Cla1Regs.MIRUN.bit.INT6 == 1);
175 
176 #define Cla1ForceTask7andWait()asm("  IACK  #0x0040");             \
177                                asm("  RPT #3 || NOP");             \
178                                 while(Cla1Regs.MIRUN.bit.INT7 == 1);
179 
180 #define Cla1ForceTask8andWait()asm("  IACK  #0x0080");             \
181                                asm("  RPT #3 || NOP");             \
182                                 while(Cla1Regs.MIRUN.bit.INT8 == 1);
183 
184 #define Cla1ForceTask1()       asm("  IACK  #0x0001")
185 #define Cla1ForceTask2()       asm("  IACK  #0x0002")
186 #define Cla1ForceTask3()       asm("  IACK  #0x0004")
187 #define Cla1ForceTask4()       asm("  IACK  #0x0008")
188 #define Cla1ForceTask5()       asm("  IACK  #0x0010")
189 #define Cla1ForceTask6()       asm("  IACK  #0x0020")
190 #define Cla1ForceTask7()       asm("  IACK  #0x0040")
191 #define Cla1ForceTask8()       asm("  IACK  #0x0080")
192 
193 #ifdef __cplusplus
194 }
195 #endif
196 
197 #endif   // - end of F2837xD_CLA_DEFINES_H
198 
199 //
200 // End of file
201 //
202