1 /** 2 ****************************************************************************** 3 * @file HAL_adc.h 4 * @author IC Applications Department 5 * @version V0.8 6 * @date 2019_08_02 7 * @brief This file contains all the functions prototypes for the ADC firmware 8 * library. 9 ****************************************************************************** 10 * @copy 11 * 12 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 13 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 14 * TIME. AS A RESULT, HOLOCENE SHALL NOT BE HELD LIABLE FOR ANY 15 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 16 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 17 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 18 * 19 * <h2><center>© COPYRIGHT 2016 HOLOCENE</center></h2> 20 */ 21 22 /* Define to prevent recursive inclusion -------------------------------------*/ 23 #ifndef __HAL_ADC_H 24 #define __HAL_ADC_H 25 26 /* Includes ------------------------------------------------------------------*/ 27 #include "HAL_device.h" 28 29 /** @addtogroup StdPeriph_Driver 30 * @{ 31 */ 32 33 /** @addtogroup ADC 34 * @{ 35 */ 36 37 /** @defgroup ADC_Exported_Types 38 * @{ 39 */ 40 41 /** 42 * @brief ADC Init structure definition 43 */ 44 45 /* 46 typedef struct 47 { 48 uint32_t ADC_Mode; 49 FunctionalState ADC_ScanConvMode; 50 FunctionalState ADC_ContinuousConvMode; 51 uint32_t ADC_ExternalTrigConv; 52 uint32_t ADC_DataAlign; 53 uint8_t ADC_NbrOfChannel; 54 }ADC_InitTypeDef; 55 */ 56 typedef struct 57 { 58 uint32_t ADC_Resolution; 59 uint32_t ADC_PRESCARE; 60 uint32_t ADC_Mode; 61 FunctionalState ADC_ContinuousConvMode; 62 uint32_t ADC_TRGEN; 63 uint32_t ADC_ExternalTrigConv; 64 uint32_t ADC_DataAlign; 65 }ADC_InitTypeDef; 66 /** 67 * @} 68 */ 69 70 /** @defgroup ADC_Exported_Constants 71 * @{ 72 */ 73 74 #define IS_ADC_ALL_PERIPH(PERIPH) (((*(uint32_t*)&(PERIPH)) == ADC1_BASE) || \ 75 ((*(uint32_t*)&(PERIPH)) == ADC2_BASE)) 76 77 #define IS_ADC_DMA_PERIPH(PERIPH) (((*(uint32_t*)&(PERIPH)) == ADC1_BASE) || \ 78 ((*(uint32_t*)&(PERIPH)) == ADC2_BASE)) 79 80 /** @defgroup ADC_Resolution 81 * @{ 82 */ 83 #define ADC_Resolution_12b ((uint32_t)0x00000000) 84 #define ADC_Resolution_11b ((uint32_t)0x00000080) 85 #define ADC_Resolution_10b ((uint32_t)0x00000100) 86 #define ADC_Resolution_9b ((uint32_t)0x00000180) 87 #define ADC_Resolution_8b ((uint32_t)0x00000200) 88 89 #define IS_ADC_RESOLUTION(RESOLUTION) (((RESOLUTION) == ADC_Resolution_12b) || \ 90 ((RESOLUTION) == ADC_Resolution_10b) || \ 91 ((RESOLUTION) == ADC_Resolution_8b) || \ 92 ((RESOLUTION) == ADC_Resolution_6b)) 93 94 /** 95 * @brief for ADC1, ADC2 96 */ 97 98 #define ADC_PCLK2_PRESCARE_2 ((uint32_t)0x00000000) 99 #define ADC_PCLK2_PRESCARE_4 ((uint32_t)0x00000010) 100 #define ADC_PCLK2_PRESCARE_6 ((uint32_t)0x00000020) 101 #define ADC_PCLK2_PRESCARE_8 ((uint32_t)0x00000030) 102 #define ADC_PCLK2_PRESCARE_10 ((uint32_t)0x00000040) 103 #define ADC_PCLK2_PRESCARE_12 ((uint32_t)0x00000050) 104 #define ADC_PCLK2_PRESCARE_14 ((uint32_t)0x00000060) 105 #define ADC_PCLK2_PRESCARE_16 ((uint32_t)0x00000070) 106 107 108 109 /** @defgroup ADC_dual_mode 110 * @{ 111 */ 112 113 #define ADC_Mode_Single ((uint32_t)0x00000000) 114 #define ADC_Mode_Single_Period ((uint32_t)0x00000200) 115 #define ADC_Mode_Continuous_Scan ((uint32_t)0x00000400) 116 117 118 #define IS_ADC_MODE(MODE) (((MODE) == ADC_Mode_Single) || \ 119 ((MODE) == ADC_Mode_Single_Period) || \ 120 ((MODE) == ADC_Mode_Continuous_Scan)) 121 /** 122 * @} 123 */ 124 125 #define ADC_TRG_Disable ((uint32_t)0xfffffffB) 126 #define ADC_TRG_Enable ((uint32_t)0x00000004) 127 128 /** @defgroup ADC_extrenal_trigger_sources_for_regular_channels_conversion 129 * @{ 130 */ 131 132 /** 133 * @brief for ADC1 134 */ 135 136 #define ADC_ExternalTrigConv_T1_CC1 ((uint32_t)0x00000000) 137 #define ADC_ExternalTrigConv_T1_CC2 ((uint32_t)0x00000010) 138 #define ADC_ExternalTrigConv_T1_CC3 ((uint32_t)0x00000020) 139 #define ADC_ExternalTrigConv_T2_CC2 ((uint32_t)0x00000030) 140 #define ADC_ExternalTrigConv_T3_TRGO ((uint32_t)0x00000040) 141 #define ADC_ExternalTrigConv_T4_CC4 ((uint32_t)0x00000050) 142 #define ADC_ExternalTrigConv_T3_CC1 ((uint32_t)0x00000060) 143 #define ADC_ExternalTrigConv_EXTI_11 ((uint32_t)0x00000070) 144 145 /** 146 * @brief for ADC2 147 */ 148 149 #define ADC_ExternalTrigConv_T1_TRGO ((uint32_t)0x00000000) 150 #define ADC_ExternalTrigConv_T1_CC4 ((uint32_t)0x00000010) 151 #define ADC_ExternalTrigConv_T2_TRGO ((uint32_t)0x00000020) 152 #define ADC_ExternalTrigConv_T2_CC1 ((uint32_t)0x00000030) 153 #define ADC_ExternalTrigConv_T3_CC4 ((uint32_t)0x00000040) 154 #define ADC_ExternalTrigConv_T4_TRGO ((uint32_t)0x00000050) 155 #define ADC_ExternalTrigConv_T3_CC1 ((uint32_t)0x00000060) 156 #define ADC_ExternalTrigConv_EXTI_15 ((uint32_t)0x00000070) 157 158 159 160 #define IS_ADC_EXT_TRIG(REGTRIG) (((REGTRIG) == ADC_ExternalTrigConv_T1_CC1) || \ 161 ((REGTRIG) == ADC_ExternalTrigConv_T1_CC2) || \ 162 ((REGTRIG) == ADC_ExternalTrigConv_T1_CC3) || \ 163 ((REGTRIG) == ADC_ExternalTrigConv_T2_CC2) || \ 164 ((REGTRIG) == ADC_ExternalTrigConv_T3_TRGO) || \ 165 ((REGTRIG) == ADC_ExternalTrigConv_T4_CC4) || \ 166 ((REGTRIG) == ADC_ExternalTrigConv_T3_CC1) || \ 167 ((REGTRIG) == ADC_ExternalTrigConv_EXTI_11) || \ 168 ((REGTRIG) == ADC_ExternalTrigConv_T1_TRGO) || \ 169 ((REGTRIG) == ADC_ExternalTrigConv_T1_CC4) || \ 170 ((REGTRIG) == ADC_ExternalTrigConv_T2_TRGO) || \ 171 ((REGTRIG) == ADC_ExternalTrigConv_T2_CC1) || \ 172 ((REGTRIG) == ADC_ExternalTrigConv_T3_CC4) || \ 173 ((REGTRIG) == ADC_ExternalTrigConv_T4_TRGO) || \ 174 ((REGTRIG) == ADC_ExternalTrigConv_T3_CC1) || \ 175 ((REGTRIG) == ADC_ExternalTrigConv_EXTI_15)) 176 /** 177 * @} 178 */ 179 180 /** @defgroup ADC_data_align 181 * @{ 182 */ 183 184 #define ADC_DataAlign_Right ((uint32_t)0x00000000) 185 #define ADC_DataAlign_Left ((uint32_t)0x00000800) 186 #define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DataAlign_Right) || \ 187 ((ALIGN) == ADC_DataAlign_Left)) 188 /** 189 * @} 190 */ 191 192 /** @defgroup ADC_channels 193 * @{ 194 */ 195 196 #define ADC_Channel_0 ((uint8_t)0x00) 197 #define ADC_Channel_1 ((uint8_t)0x01) 198 #define ADC_Channel_2 ((uint8_t)0x02) 199 #define ADC_Channel_3 ((uint8_t)0x03) 200 #define ADC_Channel_4 ((uint8_t)0x04) 201 #define ADC_Channel_5 ((uint8_t)0x05) 202 #define ADC_Channel_6 ((uint8_t)0x06) 203 #define ADC_Channel_7 ((uint8_t)0x07) 204 #define ADC_Channel_8 ((uint8_t)0x08) 205 #define ADC_Channel_All ((uint8_t)0x0f) 206 207 208 #define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_Channel_0) || ((CHANNEL) == ADC_Channel_1) || \ 209 ((CHANNEL) == ADC_Channel_2) || ((CHANNEL) == ADC_Channel_3) || \ 210 ((CHANNEL) == ADC_Channel_4) || ((CHANNEL) == ADC_Channel_5) || \ 211 ((CHANNEL) == ADC_Channel_6) || ((CHANNEL) == ADC_Channel_7) || \ 212 ((CHANNEL) == ADC_Channel_8) || ((CHANNEL) == ADC_Channel_All)) 213 /** 214 * @} 215 */ 216 217 /** 218 * @} 219 */ 220 221 #define ADC_SMPR_SMP ((uint32_t)0x00000007) /*!< SMP[2:0] bits (Sampling time selection) */ 222 #define ADC_SMPR_SMP_0 ((uint32_t)0x00000001) /*!< Bit 0 */ 223 #define ADC_SMPR_SMP_1 ((uint32_t)0x00000002) /*!< Bit 1 */ 224 #define ADC_SMPR_SMP_2 ((uint32_t)0x00000004) /*!< Bit 2 */ 225 226 /** @defgroup ADC_sampling_times 227 * @{ 228 */ 229 230 #define ADC_SampleTime_1_5Cycles ((uint32_t)0x00000000) 231 #define ADC_SampleTime_7_5Cycles ((uint32_t)0x00000001) 232 #define ADC_SampleTime_13_5Cycles ((uint32_t)0x00000002) 233 #define ADC_SampleTime_28_5Cycles ((uint32_t)0x00000003) 234 #define ADC_SampleTime_41_5Cycles ((uint32_t)0x00000004) 235 #define ADC_SampleTime_55_5Cycles ((uint32_t)0x00000005) 236 #define ADC_SampleTime_71_5Cycles ((uint32_t)0x00000006) 237 #define ADC_SampleTime_239_5Cycles ((uint32_t)0x00000007) 238 239 #define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SampleTime_1_5Cycles) || \ 240 ((TIME) == ADC_SampleTime_7_5Cycles) || \ 241 ((TIME) == ADC_SampleTime_13_5Cycles) || \ 242 ((TIME) == ADC_SampleTime_28_5Cycles) || \ 243 ((TIME) == ADC_SampleTime_41_5Cycles) || \ 244 ((TIME) == ADC_SampleTime_55_5Cycles) || \ 245 ((TIME) == ADC_SampleTime_71_5Cycles) || \ 246 ((TIME) == ADC_SampleTime_239_5Cycles)) 247 248 249 250 /** @defgroup ADC_injected_channel_selection 251 * @{ 252 */ 253 254 #define ADC_InjectedChannel_0 ((uint8_t)0x18) 255 #define ADC_InjectedChannel_1 ((uint8_t)0x1C) 256 #define ADC_InjectedChannel_2 ((uint8_t)0x20) 257 #define ADC_InjectedChannel_3 ((uint8_t)0x24) 258 #define ADC_InjectedChannel_4 ((uint8_t)0x28) 259 #define ADC_InjectedChannel_5 ((uint8_t)0x2C) 260 #define ADC_InjectedChannel_6 ((uint8_t)0x30) 261 #define ADC_InjectedChannel_7 ((uint8_t)0x34) 262 #define ADC_InjectedChannel_8 ((uint8_t)0x38) 263 #define IS_ADC_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) == ADC_InjectedChannel_1) || \ 264 ((CHANNEL) == ADC_InjectedChannel_2) || \ 265 ((CHANNEL) == ADC_InjectedChannel_3) || \ 266 ((CHANNEL) == ADC_InjectedChannel_4) || \ 267 ((CHANNEL) == ADC_InjectedChannel_5) || \ 268 ((CHANNEL) == ADC_InjectedChannel_6) || \ 269 ((CHANNEL) == ADC_InjectedChannel_7) || \ 270 ((CHANNEL) == ADC_InjectedChannel_8)) 271 /** 272 * @} 273 */ 274 275 /** @defgroup ADC_analog_watchdog_selection 276 * @{ 277 */ 278 279 #define ADC_AnalogWatchdog_SingleRegEnable ((uint32_t)0x00000002) 280 #define ADC_AnalogWatchdog_None ((uint32_t)0x00000000) 281 282 #define IS_ADC_ANALOG_WATCHDOG(WATCHDOG) (((WATCHDOG) == ADC_AnalogWatchdog_SingleRegEnable) || \ 283 ((WATCHDOG) == ADC_AnalogWatchdog_None)) 284 /** 285 * @} 286 */ 287 288 /** @defgroup ADC_interrupts_definition 289 * @{ 290 */ 291 292 #define ADC_IT_EOC ((uint16_t)0x0001) 293 #define ADC_IT_AWD ((uint16_t)0x0002) 294 295 #define IS_ADC_IT(IT) ((((IT) & (uint16_t)0xFFFC) == 0x00) && ((IT) != 0x00)) 296 297 #define IS_ADC_GET_IT(IT) (((IT) == ADC_IT_EOC) || ((IT) == ADC_IT_AWD)) 298 299 /** 300 * @} 301 */ 302 303 /** @defgroup ADC_flags_definition 304 * @{ 305 */ 306 307 #define ADC_FLAG_AWD ((uint8_t)0x02) //ADWIF 比较标志位 308 #define ADC_FLAG_EOC ((uint8_t)0x01) //ADIF 转换结束标志位 309 #define IS_ADC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint8_t)0xF0) == 0x00) && ((FLAG) != 0x00)) 310 #define IS_ADC_GET_FLAG(FLAG) (((FLAG) == ADC_FLAG_AWD) || ((FLAG) == ADC_FLAG_EOC)) 311 312 /** 313 * @} 314 */ 315 316 /** @defgroup ADC_thresholds 317 * @{ 318 */ 319 320 #define IS_ADC_THRESHOLD(THRESHOLD) ((THRESHOLD) <= 0xFFF) 321 322 /** 323 * @} 324 */ 325 326 /** @defgroup ADC_injected_offset 327 * @{ 328 */ 329 330 #define IS_ADC_OFFSET(OFFSET) ((OFFSET) <= 0xFFF) 331 332 /** 333 * @} 334 */ 335 336 /** @defgroup ADC_injected_length 337 * @{ 338 */ 339 340 #define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x4)) 341 342 /** 343 * @} 344 */ 345 346 /** @defgroup ADC_injected_rank 347 * @{ 348 */ 349 350 #define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x4)) 351 352 /** 353 * @} 354 */ 355 356 357 /** @defgroup ADC_regular_length 358 * @{ 359 */ 360 361 #define IS_ADC_REGULAR_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x10)) 362 /** 363 * @} 364 */ 365 366 /** @defgroup ADC_regular_rank 367 * @{ 368 */ 369 370 #define IS_ADC_REGULAR_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x10)) 371 372 /** 373 * @} 374 */ 375 376 /** @defgroup ADC_regular_discontinuous_mode_number 377 * @{ 378 */ 379 380 #define IS_ADC_REGULAR_DISC_NUMBER(NUMBER) (((NUMBER) >= 0x1) && ((NUMBER) <= 0x8)) 381 382 /** 383 * @} 384 */ 385 386 /** 387 * @} 388 */ 389 390 /** @defgroup ADC_Exported_Macros 391 * @{ 392 */ 393 394 /** 395 * @} 396 */ 397 398 /** @defgroup ADC_Exported_Functions 399 * @{ 400 */ 401 402 void ADC_DeInit(ADC_TypeDef* ADCx); 403 void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct); 404 void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct); 405 void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState); 406 void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState); 407 void ADC_ITConfig(ADC_TypeDef* ADCx, uint16_t ADC_IT, FunctionalState NewState); 408 void ADC_SoftwareStartConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); 409 FlagStatus ADC_GetSoftwareStartConvStatus(ADC_TypeDef* ADCx); 410 void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime); 411 void ADC_ExternalTrigConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); 412 uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx); 413 void ADC_ExternalTrigInjectedConvConfig(ADC_TypeDef* ADCx, uint32_t ADC_ExternalTrigInjecConv); 414 void ADC_ExternalTrigInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); 415 void ADC_SoftwareStartInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); 416 417 void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, uint32_t ADC_AnalogWatchdog); 418 void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold, uint16_t LowThreshold); 419 void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel); 420 void ADC_TempSensorVrefintCmd(FunctionalState NewState); 421 FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint8_t ADC_FLAG); 422 void ADC_ClearFlag(ADC_TypeDef* ADCx, uint8_t ADC_FLAG); 423 ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint16_t ADC_IT); 424 void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint16_t ADC_IT); 425 426 #endif /*__HAL_ADC_H */ 427 428 /** 429 * @} 430 */ 431 432 /** 433 * @} 434 */ 435 436 /** 437 * @} 438 */ 439 440 /*-------------------------(C) COPYRIGHT 2016 HOLOCENE ----------------------*/ 441