1 /**
2 ******************************************************************************
3 * @file  HAL_spi.c
4 * @author  IC Applications Department
5 * @version  V0.8
6 * @date  2019_08_02
7 * @brief  This file provides all the SPI firmware functions.
8 ******************************************************************************
9 * @copy
10 *
11 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 * TIME. AS A RESULT, HOLOCENE SHALL NOT BE HELD LIABLE FOR ANY
14 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 *
18 * <h2><center>&copy; COPYRIGHT 2016 HOLOCENE</center></h2>
19 */
20 
21 /* Includes ------------------------------------------------------------------*/
22 #include "HAL_spi.h"
23 #include "HAL_rcc.h"
24 
25 /** @addtogroup StdPeriph_Driver
26 * @{
27 */
28 
29 /** @defgroup SPI
30 * @brief SPI driver modules
31 * @{
32 */
33 
34 /** @defgroup SPI_Private_TypesDefinitions
35 * @{
36 */
37 
38 /**
39 * @}
40 */
41 
42 
43 /** @defgroup SPI_Private_Defines
44 * @{
45 */
46 
47 
48 
49 /* SPI SPIENE mask */
50 #define GCTL_SPIEN_Set          ((uint16_t)0x0001)
51 #define GCTL_SPIEN_Reset        ((uint16_t)0xFFFE)
52 /* SPI registers Masks */
53 #define GCTL_CLEAR_Mask       ((uint16_t)0xF000)
54 #define CCTL_CLEAR_Mask       ((uint16_t)0xFFC0)
55 #define SPBRG_CLEAR_Mask      ((uint16_t)0x0000)
56 #define SPI_DataSize_Mask     ((uint16_t)0xFCFF)
57 /**
58 * @}
59 */
60 
61 /** @defgroup SPI_Private_Macros
62 * @{
63 */
64 
65 /**
66 * @}
67 */
68 
69 /** @defgroup SPI_Private_Variables
70 * @{
71 */
72 
73 /**
74 * @}
75 */
76 
77 /** @defgroup SPI_Private_FunctionPrototypes
78 * @{
79 */
80 
81 /**
82 * @}
83 */
84 
85 /** @defgroup SPI_Private_Functions
86 * @{
87 */
88 
89 /**
90 * @brief  Deinitializes the SPIx peripheral registers to their default
91 *   reset values .
92 * @param SPIx: where x can be 0, 1 to select the SPI peripheral.
93 * @retval : None
94 */
SPI_DeInit(SPI_TypeDef * SPIx)95 void SPI_DeInit(SPI_TypeDef* SPIx)
96 {
97   /* Check the parameters */
98   assert_param(IS_SPI_ALL_PERIPH(SPIx));
99 
100   switch (*(uint32_t*)&SPIx)
101   {
102   case SPI1_BASE:
103     /* Enable SPI1 reset state */
104     RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, ENABLE);
105     /* Release SPI1 from reset state */
106     RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, DISABLE);
107     break;
108   default:
109     break;
110   }
111 }
112 
113 /**
114 * @brief  Initializes the SPIx peripheral according to the specified
115 *   parameters in the SPI_InitStruct.
116 * @param SPIx: where x can be 0, 1 to select the SPI peripheral.
117 * @param SPI_InitStruct: pointer to a SPI_InitTypeDef structure that
118 *   contains the configuration information for the specified
119 *   SPI peripheral.
120 * @retval : None
121 */
SPI_Init(SPI_TypeDef * SPIx,SPI_InitTypeDef * SPI_InitStruct)122 void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct)
123 {
124   uint32_t tmpreg = 0;
125 
126   /* check the parameters */
127   assert_param(IS_SPI_ALL_PERIPH(SPIx));
128 
129   /* Check the SPI parameters */
130   assert_param(IS_SPI_DIRECTION_MODE(SPI_InitStruct->SPI_Direction));
131   assert_param(IS_SPI_MODE(SPI_InitStruct->SPI_Mode));
132   assert_param(IS_SPI_DATASIZE(SPI_InitStruct->SPI_DataSize));
133   assert_param(IS_SPI_CPOL(SPI_InitStruct->SPI_CPOL));
134   assert_param(IS_SPI_CPHA(SPI_InitStruct->SPI_CPHA));
135   assert_param(IS_SPI_NSS(SPI_InitStruct->SPI_NSS));
136   assert_param(IS_SPI_BAUDRATE_PRESCALER(SPI_InitStruct->SPI_BaudRatePrescaler));
137   assert_param(IS_SPI_FIRST_BIT(SPI_InitStruct->SPI_FirstBit));
138   assert_param(IS_SPI_DATAWIDRH(SPI_InitStruct->SPI_DataWidth));
139   assert_param(IS_SPI_CRC_POLYNOMIAL(SPI_InitStruct->SPI_CRCPolynomial));
140   /*---------------------------- SPIx GCTL Configuration ------------------------*/
141   /* Get the SPIx GCTL value */
142   tmpreg = SPIx->GCTL;
143   /* Clear csn_sel, dmamode, txtlf, rxtlf,data_sel, rxen, txen, mm, int_en, spien bits */
144   tmpreg &= GCTL_CLEAR_Mask;
145   /* Configure SPIx: direction, NSS management, first transmitted bit, BaudRate prescaler
146   master/salve mode, CPOL and CPHA */
147   /* Set dat_sel bits according to SPI_DataSize value */
148   /* Set csn and csn_sel bits according to SPI_NSS value */
149   /* Set mm bit according to SPI_Mode value */
150   tmpreg |= (uint32_t)((uint32_t) SPI_InitStruct->SPI_DataSize   |  SPI_InitStruct->SPI_NSS |
151                        SPI_InitStruct->SPI_Mode  );
152   /* Write to SPIx GCTL */
153 //  if(SPI_InitStruct->SPI_DataSize==SPI_DataSize_8b) tmpreg |= 0x1000;
154   SPIx->GCTL = tmpreg;
155   /*---------------------------- SPIx CCTL Configuration ------------------------*/
156   tmpreg = SPIx->CCTL;
157   /* Clear spilen, lsbfe, CPOL, CPHA bits */
158   tmpreg &= CCTL_CLEAR_Mask;
159   /* Set Spilen bit according to SPI_DataWidth value */
160   /* Set LSBFirst bit according to SPI_FirstBit value */
161   /* Set CPOL bit according to SPI_CPOL value */
162   /* Set CPHA bit according to SPI_CPHA value */
163   tmpreg |= (uint16_t)((uint16_t)  SPI_InitStruct->SPI_DataWidth | SPI_InitStruct->SPI_FirstBit   |  SPI_InitStruct->SPI_CPOL |
164                        SPI_InitStruct->SPI_CPHA  );
165 
166   /* Write to SPIx CCTL */
167   SPIx->CCTL = tmpreg;
168 
169   /*---------------------------- SPIx SPBRG Configuration ------------------------*/
170   tmpreg = SPIx->SPBRG;
171   /* Clear spbrg bits */
172   tmpreg &= (uint16_t)SPBRG_CLEAR_Mask;
173   /* Set BR bits according to SPI_BaudRatePrescaler value */
174   tmpreg |= (uint16_t) SPI_InitStruct->SPI_BaudRatePrescaler;
175   /* Write to SPIx SPBRG */
176   SPIx->SPBRG = tmpreg;
177 
178 }
179 
180 /**
181 * @brief  Fills each SPI_InitStruct member with its default value.
182 * @param SPI_InitStruct : pointer to a SPI_InitTypeDef structure
183 *   which will be initialized.
184 * @retval : None
185 */
SPI_StructInit(SPI_InitTypeDef * SPI_InitStruct)186 void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct)
187 {
188   /*--------------- Reset SPI init structure parameters values -----------------*/
189 
190   /* initialize the SPI_Mode member */
191   SPI_InitStruct->SPI_Mode = SPI_Mode_Slave;
192   /* initialize the SPI_DataSize member */
193   SPI_InitStruct->SPI_DataSize = SPI_DataSize_8b;
194   /* Initialize the SPILEN member */
195   SPI_InitStruct->SPI_DataWidth = SPI_DataWidth_8b;
196   /* Initialize the SPI_CPOL member */
197   SPI_InitStruct->SPI_CPOL = SPI_CPOL_Low;
198   /* Initialize the SPI_CPHA member */
199   SPI_InitStruct->SPI_CPHA = SPI_CPHA_1Edge;
200   /* Initialize the SPI_NSS member */
201   SPI_InitStruct->SPI_NSS = SPI_NSS_Soft;
202   /* Initialize the SPI_BaudRatePrescaler member */
203   SPI_InitStruct->SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2;
204   /* Initialize the SPI_FirstBit member */
205   SPI_InitStruct->SPI_FirstBit = SPI_FirstBit_MSB;
206 
207 }
208 
209 
210 /**
211 * @brief  Enables or disables the specified SPI peripheral.
212 * @param SPIx: where x can be 0, 1 to select the SPI peripheral.
213 * @param NewState: new state of the SPIx peripheral.
214 *   This parameter can be: ENABLE or DISABLE.
215 * @retval : None
216 */
SPI_Cmd(SPI_TypeDef * SPIx,FunctionalState NewState)217 void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState)
218 {
219   /* Check the parameters */
220   assert_param(IS_SPI_ALL_PERIPH(SPIx));
221   assert_param(IS_FUNCTIONAL_STATE(NewState));
222   if (NewState != DISABLE)
223   {
224     /* Enable the selected SPI peripheral */
225     SPIx->GCTL |= GCTL_SPIEN_Set;
226   }
227   else
228   {
229     /* Disable the selected SPI peripheral */
230     SPIx->GCTL &= GCTL_SPIEN_Reset;
231   }
232 }
233 
234 
235 /**
236 * @brief  Enables or disables the specified SPIinterrupts.
237 * @param SPIx: where x can be :
238 *   0, 1  in SPI mode
239 * @param SPI_IT: specifies the SPI interrupt source to be
240 *   enabled or disabled.
241 *   This parameter can be one of the following values:
242 * @arg SPI_IT_TX: Tx buffer empty interrupt mask
243 * @arg SPI_IT_RX: Rx buffer  interrupt mask
244 * @arg SPI_IT_UNDERRUN: under Error interrupt mask in slave mode
245 * @arg SPI_IT_RXOVER: RX OVER Error interrupt mask
246 * @arg SPI_IT_RXMATCH: spectials rx data numbers  interrupt mask
247 * @arg SPI_IT_RXFULL: Rx buffer full interrupt mask
248 * @arg SPI_IT_TXEPT: Tx buffer empty interrupt mask
249 * @param NewState: new state of the specified SPI interrupt.
250 *   This parameter can be: ENABLE or DISABLE.
251 * @retval : None
252 */
SPI_ITConfig(SPI_TypeDef * SPIx,uint8_t SPI_IT,FunctionalState NewState)253 void SPI_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_IT, FunctionalState NewState)
254 {
255   /* Check the parameters */
256   assert_param(IS_SPI_ALL_PERIPH(SPIx));
257   assert_param(IS_FUNCTIONAL_STATE(NewState));
258   assert_param(IS_SPI_CONFIG_IT(SPI_IT));
259 
260   if (NewState != DISABLE)
261   {
262     /* Enable the selected SPI Global interrupt */
263     SPIx->GCTL |= SPI_INT_EN;
264     /* Enable the selected SPI interrupt */
265     SPIx->INTEN |= SPI_IT;
266   }
267   else
268   {
269     /* Disable the selected SPI interrupt */
270     SPIx->INTEN &= (uint16_t)~SPI_IT;
271     /* Disable the selected SPI Global interrupt */
272     SPIx->GCTL &= (uint16_t)~SPI_INT_EN;
273   }
274 
275 }
276 
277 /**
278 * @brief  Enables or disables the SPIx DMA interface.
279 * @param SPIx: where x can be :
280 *   0, 1 in SPI mode
281 * @param SPI_DMAReq: specifies the SPI DMA transfer request
282 *   to be enabled or disabled.
283 *   This parameter can be any combination of the following values:
284 * @arg SPI_DMAReq_EN: DMA transfer request enable
285 * @param NewState: new state of the selected SPI DMA transfer
286 *   request.
287 *   This parameter can be: ENABLE or DISABLE.
288 * @retval : None
289 */
SPI_DMACmd(SPI_TypeDef * SPIx,uint16_t SPI_DMAReq,FunctionalState NewState)290 void SPI_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_DMAReq, FunctionalState NewState)
291 {
292   /* Check the parameters */
293   assert_param(IS_SPI_ALL_PERIPH(SPIx));
294   assert_param(IS_FUNCTIONAL_STATE(NewState));
295   assert_param(IS_SPI_DMAREQ(SPI_DMAReq));
296   if (NewState != DISABLE)
297   {
298     /* Enable the selected SPI DMA requests */
299     SPIx->GCTL |= SPI_DMAReq;
300   }
301   else
302   {
303     /* Disable the selected SPI DMA requests */
304     SPIx->GCTL &= (uint32_t)~SPI_DMAReq;
305   }
306 }
307 
308 /**
309 * @brief  configure tn Fifo trigger level bit.
310 * @param SPIx: where x can be :
311 *   0, 1 in SPI mode
312 * @param SPI_FifoTriggerValue: specifies the Fifo trigger level
313 *   This parameter can be any combination of the following values:
314 * SPI_TXTLF : SPI TX FIFO Trigger value set
315 * SPI_RXTLF : SPI RX FIFO Trigger value set
316 * @param NewState: new state of the selected SPI DMA transfer
317 *   request.
318 *   This parameter can be: ENABLE or DISABLE.
319 * @retval : None
320 */
SPI_FifoTrigger(SPI_TypeDef * SPIx,uint16_t SPI_FifoTriggerValue,FunctionalState NewState)321 void SPI_FifoTrigger(SPI_TypeDef* SPIx, uint16_t SPI_FifoTriggerValue, FunctionalState NewState)
322 {
323   /* Check the parameters */
324   assert_param(IS_SPI_ALL_PERIPH(SPIx));
325   assert_param(IS_FUNCTIONAL_STATE(NewState));
326   assert_param(IS_SPI_FIFOTRIGGER(SPI_FifoTriggerValue));
327 
328   if (NewState != DISABLE)
329   {
330     /* Enable the selected SPI DMA requests */
331     SPIx->GCTL |= SPI_FifoTriggerValue;
332   }
333   else
334   {
335     /* Disable the selected SPI DMA requests */
336     SPIx->GCTL &= (uint32_t)~SPI_FifoTriggerValue;
337   }
338 }
339 
340 /**
341 * @brief  Transmits a Data through the SPIx peripheral.
342 * @param SPIx: where x can be :
343 *   0, 1 in SPI mode
344 * @param Data : Data to be transmitted..
345 * @retval : None
346 */
SPI_SendData(SPI_TypeDef * SPIx,uint16_t Data)347 void SPI_SendData(SPI_TypeDef* SPIx, uint16_t Data)
348 {
349   /* Check the parameters */
350   assert_param(IS_SPI_ALL_PERIPH(SPIx));
351 
352   /* Write in the TXREG register the data to be sent */
353   SPIx->TXREG = Data;
354 }
355 
356 /**
357 * @brief  Returns the most recent received data by the SPIx peripheral.
358 * @param SPIx: where x can be :
359 *   0, 1 in SPI mode
360 * @retval : The value of the received data.
361 */
SPI_ReceiveData(SPI_TypeDef * SPIx)362 uint16_t SPI_ReceiveData(SPI_TypeDef* SPIx)
363 {
364   /* Check the parameters */
365   assert_param(IS_SPI_ALL_PERIPH(SPIx));
366 
367   /* Return the data in the RXREG register */
368   return SPIx->RXREG;
369 }
370 
371 /**
372 * @brief Slave chip csn single by selected
373 * @param SPIx: where x can be 0, 1 to select the SPI peripheral.
374 * @param SPI_CSInternalSelected: specifies the SPI CS internal selected.
375 *   This parameter can be one of the following values:
376 * @arg SPI_CS_BIT0: cs bit 0 selected
377 * @arg SPI_CS_BIT1: cs bit 1 selected
378 * @arg SPI_CS_BIT2: cs bit 2 selected
379 * @arg SPI_CS_BIT3: cs bit 3 selected
380 * @arg SPI_CS_BIT4: cs bit 4 selected
381 * @arg SPI_CS_BIT5: cs bit 5 selected
382 * @arg SPI_CS_BIT6: cs bit 6 selected
383 * @arg SPI_CS_BIT7: cs bit 7 selected
384 * @param NewState: new state of the selected SPI CS pin
385 *   request.
386 *   This parameter can be: ENABLE or DISABLE.
387 * @retval : None
388 */
SPI_CSInternalSelected(SPI_TypeDef * SPIx,uint16_t SPI_CSInternalSelected,FunctionalState NewState)389 void SPI_CSInternalSelected(SPI_TypeDef* SPIx, uint16_t SPI_CSInternalSelected,FunctionalState NewState)
390 {
391   /* Check the parameters */
392   assert_param(IS_SPI_ALL_PERIPH(SPIx));
393   assert_param(IS_SPI_CS(SPI_CSInternalSelected));
394   assert_param(IS_FUNCTIONAL_STATE(NewState));
395 
396 
397   if (NewState != DISABLE)
398   {
399     /* selected cs pin according SCSR Value */
400     SPIx->SCSR &= SPI_CSInternalSelected;
401   }
402   else
403   {
404     /* release cs pin according SCSR Value*/
405     SPIx->SCSR |= ~SPI_CSInternalSelected;
406   }
407 }
408 
409 /**
410 * @brief  Configures the data size for the selected SPI.
411 * @param SPIx: where x can be 0, 1 to select the SPI peripheral.
412 * @param SPI_DataSize: specifies the SPI data size.
413 *   This parameter can be one of the following values:
414 * @arg SPI_DataSize_32b: Set data frame format to 32bit
415 * @arg SPI_DataSize_16b: Set data frame format to 16bit
416 * @arg SPI_DataSize_8b: Set data frame format to 8bit
417 * @retval : None
418 */
SPI_DataSizeConfig(SPI_TypeDef * SPIx,uint16_t SPI_DataSize)419 void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize)
420 {
421   /* Check the parameters */
422   assert_param(IS_SPI_ALL_PERIPH(SPIx));
423   assert_param(IS_SPI_DATASIZE(SPI_DataSize));
424   /* Clear data_sel bit */
425   SPIx->GCTL &= SPI_DataSize_Mask;
426   /* Set new data_sel bit value */
427   SPIx->GCTL |= SPI_DataSize;
428 }
429 
430 
431 
432 /**
433 * @brief  Selects the data transfer direction in bi-directional mode
434 *   for the specified SPI.
435 * @param SPIx: where x can be 0, 1 to select the SPI peripheral.
436 * @param SPI_Direction: specifies the data transfer direction in
437 *   bi-directional mode.
438 *   This parameter can be one of the following values:
439 * @arg SPI_Direction_Tx: Selects Tx transmission direction
440 * @arg SPI_Direction_Rx: Selects Rx receive direction
441 @arg SPI_Disable_Tx: Selects Rx receive direction
442 @arg SPI_Disable_Rx: Selects Rx receive direction
443 * @retval : None
444 */
SPI_BiDirectionalLineConfig(SPI_TypeDef * SPIx,uint16_t SPI_Direction)445 void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction)
446 {
447   /* Check the parameters */
448   assert_param(IS_SPI_ALL_PERIPH(SPIx));
449   assert_param(IS_SPI_DIRECTION(SPI_Direction));
450 
451   /* Set the Tx  only mode */
452   if(SPI_Direction==SPI_Direction_Tx)
453   {
454     SPIx->GCTL |= SPI_Direction_Tx;
455   }
456   /* Set the  Rx  only mode */
457   if(SPI_Direction==SPI_Direction_Rx)
458   {
459     SPIx->GCTL |= SPI_Direction_Rx;
460   }
461   /* Disable the  Tx  only mode */
462   if(SPI_Direction==SPI_Disable_Tx)
463   {
464     SPIx->GCTL &= SPI_Disable_Tx;
465   }
466   /* Disable the  Rx  only mode */
467   if(SPI_Direction==SPI_Disable_Rx)
468   {
469     SPIx->GCTL &= SPI_Disable_Rx;
470   }
471 }
472 
473 /**
474 * @brief  Checks whether the specified SPI flag is set or not.
475 * @param SPIx: where x can be :
476 *   0, 1 in SPI mode
477 * @param SPI_FLAG: specifies the SPI flag to check.
478 *   This parameter can be one of the following values:
479 * @arg SPI_FLAG_RXAVL: Rx buffer has bytes flag
480 * @arg SPI_FLAG_TXEPT:  Tx  buffer  and tx shifter empty flag
481 * @retval : The new state of SPI_FLAG (SET or RESET).
482 */
SPI_GetFlagStatus(SPI_TypeDef * SPIx,uint16_t SPI_FLAG)483 FlagStatus SPI_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_FLAG)
484 {
485   FlagStatus bitstatus = RESET;
486   /* Check the parameters */
487   assert_param(IS_SPI_ALL_PERIPH(SPIx));
488   assert_param(IS_SPI_GET_FLAG(SPI_FLAG));
489   /* Check the status of the specified SPI flag */
490   if ((SPIx->CSTAT & SPI_FLAG) != (uint16_t)RESET)
491   {
492     /* SPI_FLAG is set */
493     bitstatus = SET;
494   }
495   else
496   {
497     /* SPI_FLAG is reset */
498     bitstatus = RESET;
499   }
500   /* Return the SPI_FLAG status */
501   return  bitstatus;
502 }
503 
504 /**
505 * @brief  Checks whether the specified SPI interrupt has occurred or not.
506 * @param SPIx: where x can be :
507 *  0, 1 in SPI mode
508 * @param SPI_IT: specifies the SPI interrupt source to check.
509 *   This parameter can be one of the following values:
510 * @arg SPI_IT_TX: Tx buffer empty interrupt
511 * @arg SPI_IT_RX: Rx buffer  interrupt
512 * @arg SPI_IT_UNDERRUN: under Error interrupt in slave mode
513 * @arg SPI_IT_RXOVER: RX OVER Error interrupt
514 * @arg SPI_IT_RXMATCH: spectials rx data numbers  interrupt
515 * @arg SPI_IT_RXFULL: Rx buffer full interrupt
516 * @arg SPI_IT_TXEPT: Tx buffer  and tx shifter empty interrupt
517 * @retval : The new state of SPI_IT (SET or RESET).
518 */
SPI_GetITStatus(SPI_TypeDef * SPIx,uint8_t SPI_IT)519 ITStatus SPI_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_IT)
520 {
521   ITStatus bitstatus = RESET;
522 
523   /* Check the parameters */
524   assert_param(IS_SPI_ALL_PERIPH(SPIx));
525   assert_param(IS_SPI_GET_IT(SPI_IT));
526   /* Check the status of the specified SPI interrupt */
527   if ((SPIx->INTSTAT & SPI_IT) != (uint16_t)RESET)
528   {
529     /* SPI_IT is set */
530     bitstatus = SET;
531   }
532   else
533   {
534     /* SPI_IT is reset */
535     bitstatus = RESET;
536   }
537   /* Return the SPI_IT status */
538   return bitstatus;
539 }
540 
541 /**
542 * @brief  Clears the SPIx  Error  interrupt pending bit.
543 * @param SPIx: where x can be :
544 *   0, 1 in SPI mode
545 * @param SPI_IT: specifies the SPI interrupt pending bit to clear.
546 * @arg SPI_IT_TX: Tx buffer empty interrupt
547 * @arg SPI_IT_RX: Rx buffer  interrupt
548 * @arg SPI_IT_UNDERRUN: under Error interrupt in slave mode
549 * @arg SPI_IT_RXOVER: RX OVER Error interrupt
550 * @arg SPI_IT_RXMATCH: spectials rx data numbers  interrupt
551 * @arg SPI_IT_RXFULL: Rx buffer full interrupt
552 * @arg SPI_IT_TXEPT: Tx buffer  and tx shifter empty interrupt
553 *   This function clears only ERR intetrrupt pending bit.
554 * @retval : None
555 */
SPI_ClearITPendingBit(SPI_TypeDef * SPIx,uint8_t SPI_IT)556 void SPI_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_IT)
557 {
558 
559   /* Check the parameters */
560   assert_param(IS_SPI_ALL_PERIPH(SPIx));
561   assert_param(IS_SPI_CLEAR_IT(SPI_IT));
562 
563   /* Clear the selected SPI IT INTERRUPT */
564   SPIx->INTCLR |= (uint16_t)SPI_IT;
565 }
566 
567 
568 /**
569 * @brief  SPI Hole a count Received bytes in next receive process.
570 * @param SPIx: where x can be 0, 1 in SPI mode
571 * @param Number: specifies the SPI receive Number.
572 *   This parament can be 1-65535.
573 *   This function can use only in SPI master single receive mode.
574 * @retval : None
575 */
SPI_RxBytes(SPI_TypeDef * SPIx,uint16_t Number)576 void SPI_RxBytes(SPI_TypeDef* SPIx, uint16_t Number)
577 {
578   /* Check the parameters */
579   assert_param(IS_SPI_ALL_PERIPH(SPIx));
580   /*set the received bytes in next receive process */
581   SPIx->RXDNR = Number;
582 }
583 
584 /**
585 * @brief  slave mode tx data transmit phase adjust set.
586 * @param SPIx: where x can be 0, 1 in SPI mode
587 * @param AdjustValue: specifies the SPI receive Number.
588 *   This parament can be :
589 *   SPI_SlaveAdjust_FAST:  fast speed use
590 *   SPI_SlaveAdjust_LOW:   low speed use
591 *   This function can use only in SPI master single receive mode.
592 * @retval : None
593 */
SPI_SlaveAdjust(SPI_TypeDef * SPIx,uint16_t AdjustValue)594 void SPI_SlaveAdjust(SPI_TypeDef* SPIx, uint16_t AdjustValue)
595 {
596   /* Check the parameters */
597   assert_param(IS_SPI_ALL_PERIPH(SPIx));
598   assert_param(IS_SPI_SlaveAdjust(AdjustValue));
599   /*set the AdjustValue according to txedge bit of CCTL register*/
600   SPIx->CCTL |= AdjustValue;
601 }
602 
603 
604 /**
605 * @}
606 */
607 
608 /**
609 * @}
610 */
611 
612 /**
613 * @}
614 */
615 
616 /*-------------------------(C) COPYRIGHT 2016 HOLOCENE ----------------------*/
617