1 /*
2  * Copyright (c) 2006-2021, RT-Thread Development Team
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  *
6  * Change Logs:
7  * Date           Author       Notes
8  * 2020-06-27     AHTYDHD      the first version
9  */
10 
11 #include "drv_gpio.h"
12 #include <rthw.h>
13 #include <rtdevice.h>
14 #include "drv_gpio.h"
15 #include <stdint.h>
16 #include <stdbool.h>
17 #include "inc/hw_memmap.h"
18 #include "driverlib/sysctl.h"
19 #include "driverlib/gpio.h"
20 #include "driverlib/pin_map.h"
21 
22 #ifdef RT_USING_PIN
23 
24 static const struct pin_index pins[] =
25 {
26     _TM4C_PIN(0, F, 0),
27     _TM4C_PIN(1, F, 1),
28     _TM4C_PIN(2, F, 2),
29     _TM4C_PIN(3, F, 3),
30     _TM4C_PIN(4, F, 4)
31 };
32 
33 /* this is pin_irq map, reserved for update */
34 static struct rt_pin_irq_hdr pin_irq_hdr_tab[] =
35 {
36     {-1, 0, RT_NULL, RT_NULL},
37 };
38 
39 static uint32_t pin_irq_enable_mask = 0;
40 
41 #define ITEM_NUM(items) sizeof(items) / sizeof(items[0])
42 
get_pin(uint8_t pin)43 static const struct pin_index *get_pin(uint8_t pin)
44 {
45     const struct pin_index *index;
46 
47     if (pin < ITEM_NUM(pins))
48     {
49         index = &pins[pin];
50         if (index->index == -1)
51             index = RT_NULL;
52     }
53     else
54     {
55         index = RT_NULL;
56     }
57     return index;
58 };
59 
tm4c123_pin_mode(rt_device_t dev,rt_base_t pin,rt_base_t mode)60 static void tm4c123_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
61 {
62     const struct pin_index *index;
63     index = get_pin(pin);
64     if (index == RT_NULL)
65     {
66         return;
67     }
68 
69     if (mode == PIN_MODE_INPUT)
70     {
71         GPIOPinTypeGPIOInput(index ->gpioBaseAddress, index->pin);
72     }
73     else if (mode == PIN_MODE_OUTPUT)
74     {
75         GPIOPinTypeGPIOOutput(index->gpioBaseAddress, index->pin);
76     }
77     else if (mode == PIN_MODE_INPUT_PULLUP)
78     {
79         GPIODirModeSet(index->gpioBaseAddress, index->pin, GPIO_DIR_MODE_IN);
80         GPIOPadConfigSet(index->gpioBaseAddress, index->pin, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD_WPU);
81     }
82     else if (mode == PIN_MODE_INPUT_PULLDOWN)
83     {
84         GPIODirModeSet(index->gpioBaseAddress, index->pin, GPIO_DIR_MODE_IN);
85         GPIOPadConfigSet(index->gpioBaseAddress, index->pin, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD_WPD);
86     }
87     else if (mode == PIN_MODE_OUTPUT_OD)
88     {
89         GPIOPadConfigSet(index->gpioBaseAddress, index->pin, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_OD);
90         GPIODirModeSet(index->gpioBaseAddress, index->pin, GPIO_DIR_MODE_OUT);
91     }
92 
93 }
94 
tm4c123_pin_write(rt_device_t dev,rt_base_t pin,rt_base_t ui8Val)95 static void tm4c123_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t ui8Val)
96 {
97     const struct pin_index *index;
98     index = get_pin(pin);
99     if (index == RT_NULL)
100     {
101         return;
102     }
103     if (ui8Val)
104     {
105         GPIOPinWrite(index ->gpioBaseAddress, index->pin, index->pin);
106     }
107     else
108     {
109         GPIOPinWrite(index ->gpioBaseAddress, index->pin, 0);
110     }
111 }
112 
tm4c123_pin_read(rt_device_t dev,rt_base_t pin)113 static rt_ssize_t tm4c123_pin_read(rt_device_t dev, rt_base_t pin)
114 {
115     const struct pin_index *index;
116     rt_ssize_t value = 0;
117 
118     index = get_pin(pin);
119     if (index == RT_NULL)
120     {
121         return -RT_EINVAL;
122     }
123     value = GPIOPinRead(index ->gpioBaseAddress, index ->pin);
124 
125     return value;
126 }
127 
tm4c123_pin_attach_irq(rt_device_t device,rt_int32_t pin,rt_uint32_t mode,void (* hdr)(void * args),void * args)128 static rt_err_t tm4c123_pin_attach_irq(rt_device_t device, rt_int32_t pin, rt_uint32_t mode, void (*hdr)(void *args), void *args)
129 {
130     /* this is interface for pin_irq, reserved for update. */
131     return RT_EOK;
132 }
133 
tm4c123_pin_dettach_irq(rt_device_t device,rt_int32_t pin)134 static rt_err_t tm4c123_pin_dettach_irq(rt_device_t device, rt_int32_t pin)
135 {
136     /* this is interface for pin_irq, reserved for update. */
137     return RT_EOK;
138 }
139 
tm4c123_pin_irq_enable(rt_device_t device,rt_base_t pin,rt_uint32_t enabled)140 static rt_err_t tm4c123_pin_irq_enable(rt_device_t device, rt_base_t pin,
141                                        rt_uint32_t enabled)
142 {
143     /* this is interface for pin_irq_enable, reserved for update. */
144     return RT_EOK;
145 }
146 
147 
148 const static struct rt_pin_ops _tm4c123_pin_ops =
149 {
150     tm4c123_pin_mode,
151     tm4c123_pin_write,
152     tm4c123_pin_read,
153     tm4c123_pin_attach_irq,
154     tm4c123_pin_dettach_irq,
155     tm4c123_pin_irq_enable,
156     RT_NULL,
157 };
158 
rt_hw_pin_init(void)159 int rt_hw_pin_init(void)
160 {
161     SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);
162     return rt_device_pin_register("pin", &_tm4c123_pin_ops, RT_NULL);
163 }
164 INIT_BOARD_EXPORT(rt_hw_pin_init);
165 
166 #endif   /*RT_USING_PIN*/
167 
168 /************************** end of file ******************/
169