1 //*****************************************************************************
2 //
3 // aes.h - Defines and Macros for the AES module.
4 //
5 // Copyright (c) 2012-2017 Texas Instruments Incorporated.  All rights reserved.
6 // Software License Agreement
7 //
8 //   Redistribution and use in source and binary forms, with or without
9 //   modification, are permitted provided that the following conditions
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11 //
12 //   Redistributions of source code must retain the above copyright
13 //   notice, this list of conditions and the following disclaimer.
14 //
15 //   Redistributions in binary form must reproduce the above copyright
16 //   notice, this list of conditions and the following disclaimer in the
17 //   documentation and/or other materials provided with the
18 //   distribution.
19 //
20 //   Neither the name of Texas Instruments Incorporated nor the names of
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22 //   from this software without specific prior written permission.
23 //
24 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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26 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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34 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 //
36 // This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
37 //
38 //*****************************************************************************
39 
40 #ifndef __DRIVERLIB_AES_H__
41 #define __DRIVERLIB_AES_H__
42 
43 //*****************************************************************************
44 //
45 // If building with a C++ compiler, make all of the definitions in this header
46 // have a C binding.
47 //
48 //*****************************************************************************
49 #ifdef __cplusplus
50 extern "C"
51 {
52 #endif
53 
54 //*****************************************************************************
55 //
56 // The following defines are used to specify the operation direction in the
57 // ui32Config argument in the AESConfig function.  Only one is permitted.
58 //
59 //*****************************************************************************
60 #define AES_CFG_DIR_ENCRYPT     0x00000004
61 #define AES_CFG_DIR_DECRYPT     0x00000000
62 
63 //*****************************************************************************
64 //
65 // The following defines are used to specify the key size in the ui32Config
66 // argument in the AESConfig function.  Only one is permitted.
67 //
68 //*****************************************************************************
69 #define AES_CFG_KEY_SIZE_128BIT 0x00000008
70 #define AES_CFG_KEY_SIZE_192BIT 0x00000010
71 #define AES_CFG_KEY_SIZE_256BIT 0x00000018
72 
73 //*****************************************************************************
74 //
75 // The following defines are used to specify the mode of operation in the
76 // ui32Config argument in the AESConfig function.  Only one is permitted.
77 //
78 //*****************************************************************************
79 #define AES_CFG_MODE_M          0x2007fe60
80 #define AES_CFG_MODE_ECB        0x00000000
81 #define AES_CFG_MODE_CBC        0x00000020
82 #define AES_CFG_MODE_CTR        0x00000040
83 #define AES_CFG_MODE_ICM        0x00000200
84 #define AES_CFG_MODE_CFB        0x00000400
85 #define AES_CFG_MODE_XTS_TWEAKJL \
86                                 0x00000800
87 #define AES_CFG_MODE_XTS_K2IJL \
88                                 0x00001000
89 #define AES_CFG_MODE_XTS_K2ILJ0 \
90                                 0x00001800
91 #define AES_CFG_MODE_F8         0x00002000
92 #define AES_CFG_MODE_F9         0x20004000
93 #define AES_CFG_MODE_CBCMAC     0x20008000
94 #define AES_CFG_MODE_GCM_HLY0ZERO \
95                                 0x20010000
96 #define AES_CFG_MODE_GCM_HLY0CALC \
97                                 0x20020040
98 #define AES_CFG_MODE_GCM_HY0CALC \
99                                 0x20030040
100 #define AES_CFG_MODE_CCM        0x20040040
101 
102 //*****************************************************************************
103 //
104 // The following defines are used to specify the counter width in the
105 // ui32Config argument in the AESConfig function.  It is only required to
106 // be defined when using CTR, CCM, or GCM modes.  Only one length is permitted.
107 //
108 //*****************************************************************************
109 #define AES_CFG_CTR_WIDTH_32    0x00000000
110 #define AES_CFG_CTR_WIDTH_64    0x00000080
111 #define AES_CFG_CTR_WIDTH_96    0x00000100
112 #define AES_CFG_CTR_WIDTH_128   0x00000180
113 
114 //*****************************************************************************
115 //
116 // The following defines are used to define the width of the length field for
117 // CCM operation through the ui32Config argument in the AESConfig function.
118 // This value is also known as L.  Only one is permitted.
119 //
120 //*****************************************************************************
121 #define AES_CFG_CCM_L_1         0x00000000
122 #define AES_CFG_CCM_L_2         0x00080000
123 #define AES_CFG_CCM_L_3         0x00100000
124 #define AES_CFG_CCM_L_4         0x00180000
125 #define AES_CFG_CCM_L_5         0x00200000
126 #define AES_CFG_CCM_L_6         0x00280000
127 #define AES_CFG_CCM_L_7         0x00300000
128 #define AES_CFG_CCM_L_8         0x00380000
129 
130 //*****************************************************************************
131 //
132 // The following defines are used to define the length of the authentication
133 // field for CCM operations through the ui32Config argument in the AESConfig
134 // function.  This value is also known as M.  Only one is permitted.
135 //
136 //*****************************************************************************
137 #define AES_CFG_CCM_M_4         0x00400000
138 #define AES_CFG_CCM_M_6         0x00800000
139 #define AES_CFG_CCM_M_8         0x00c00000
140 #define AES_CFG_CCM_M_10        0x01000000
141 #define AES_CFG_CCM_M_12        0x01400000
142 #define AES_CFG_CCM_M_14        0x01800000
143 #define AES_CFG_CCM_M_16        0x01c00000
144 
145 //*****************************************************************************
146 //
147 // Interrupt flags for use with the AESIntEnable, AESIntDisable, and
148 // AESIntStatus functions.
149 //
150 //*****************************************************************************
151 #define AES_INT_CONTEXT_IN      0x00000001
152 #define AES_INT_CONTEXT_OUT     0x00000008
153 #define AES_INT_DATA_IN         0x00000002
154 #define AES_INT_DATA_OUT        0x00000004
155 #define AES_INT_DMA_CONTEXT_IN  0x00010000
156 #define AES_INT_DMA_CONTEXT_OUT 0x00080000
157 #define AES_INT_DMA_DATA_IN     0x00020000
158 #define AES_INT_DMA_DATA_OUT    0x00040000
159 
160 //*****************************************************************************
161 //
162 // Defines used when enabling and disabling DMA requests in the
163 // AESEnableDMA and AESDisableDMA functions.
164 //
165 //*****************************************************************************
166 #define AES_DMA_DATA_IN         0x00000020
167 #define AES_DMA_DATA_OUT        0x00000040
168 #define AES_DMA_CONTEXT_IN      0x00000080
169 #define AES_DMA_CONTEXT_OUT     0x00000100
170 
171 //*****************************************************************************
172 //
173 // Function prototypes.
174 //
175 //*****************************************************************************
176 extern void AESAuthLengthSet(uint32_t ui32Base, uint32_t ui32Length);
177 extern void AESConfigSet(uint32_t ui32Base, uint32_t ui32Config);
178 extern void AESDataRead(uint32_t ui32Base, uint32_t *pui32Dest);
179 extern bool AESDataReadNonBlocking(uint32_t ui32Base, uint32_t *pui32Dest);
180 extern bool AESDataProcess(uint32_t ui32Base, uint32_t *pui32Src,
181                            uint32_t *pui32Dest, uint32_t ui32Length);
182 extern bool AESDataAuth(uint32_t ui32Base, uint32_t *pui32Src,
183                         uint32_t ui32Length, uint32_t *pui32Tag);
184 extern bool AESDataProcessAuth(uint32_t ui32Base, uint32_t *pui32Src,
185                                uint32_t *pui32Dest, uint32_t ui32Length,
186                                uint32_t *pui32AuthSrc,
187                                uint32_t ui32AuthLength, uint32_t *pui32Tag);
188 extern void AESDataWrite(uint32_t ui32Base, uint32_t *pui32Src);
189 extern bool AESDataWriteNonBlocking(uint32_t ui32Base, uint32_t *pui32Src);
190 extern void AESDMADisable(uint32_t ui32Base, uint32_t ui32Flags);
191 extern void AESDMAEnable(uint32_t ui32Base, uint32_t ui32Flags);
192 extern void AESIntClear(uint32_t ui32Base, uint32_t ui32IntFlags);
193 extern void AESIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags);
194 extern void AESIntEnable(uint32_t ui32Base, uint32_t ui32IntFlags);
195 extern void AESIntRegister(uint32_t ui32Base, void (*pfnHandler)(void));
196 extern uint32_t AESIntStatus(uint32_t ui32Base, bool bMasked);
197 extern void AESIntUnregister(uint32_t ui32Base);
198 extern void AESIVSet(uint32_t ui32Base, uint32_t *pui32IVdata);
199 extern void AESIVRead(uint32_t ui32Base, uint32_t *pui32IVdata);
200 extern void AESKey1Set(uint32_t ui32Base, uint32_t *pui32Key,
201                        uint32_t ui32Keysize);
202 extern void AESKey2Set(uint32_t ui32Base, uint32_t *pui32Key,
203                        uint32_t ui32Keysize);
204 extern void AESKey3Set(uint32_t ui32Base, uint32_t *pui32Key);
205 extern void AESLengthSet(uint32_t ui32Base, uint64_t ui64Length);
206 extern void AESReset(uint32_t ui32Base);
207 extern void AESTagRead(uint32_t ui32Base, uint32_t *pui32TagData);
208 
209 //*****************************************************************************
210 //
211 // Mark the end of the C bindings section for C++ compilers.
212 //
213 //*****************************************************************************
214 #ifdef __cplusplus
215 }
216 #endif
217 
218 #endif // __DRIVERLIB_AES_H__
219