1 //***************************************************************************** 2 // 3 // hw_ccm.h - Macros used when accessing the CCM hardware. 4 // 5 // Copyright (c) 2012-2017 Texas Instruments Incorporated. All rights reserved. 6 // Software License Agreement 7 // 8 // Redistribution and use in source and binary forms, with or without 9 // modification, are permitted provided that the following conditions 10 // are met: 11 // 12 // Redistributions of source code must retain the above copyright 13 // notice, this list of conditions and the following disclaimer. 14 // 15 // Redistributions in binary form must reproduce the above copyright 16 // notice, this list of conditions and the following disclaimer in the 17 // documentation and/or other materials provided with the 18 // distribution. 19 // 20 // Neither the name of Texas Instruments Incorporated nor the names of 21 // its contributors may be used to endorse or promote products derived 22 // from this software without specific prior written permission. 23 // 24 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 25 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 26 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 27 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 28 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 29 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 30 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 34 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 // 36 // This is part of revision 2.1.4.178 of the Tiva Firmware Development Package. 37 // 38 //***************************************************************************** 39 40 #ifndef __HW_CCM_H__ 41 #define __HW_CCM_H__ 42 43 //***************************************************************************** 44 // 45 // The following are defines for the EC register offsets. 46 // 47 //***************************************************************************** 48 #define CCM_O_CRCCTRL 0x00000400 // CRC Control 49 #define CCM_O_CRCSEED 0x00000410 // CRC SEED/Context 50 #define CCM_O_CRCDIN 0x00000414 // CRC Data Input 51 #define CCM_O_CRCRSLTPP 0x00000418 // CRC Post Processing Result 52 53 //***************************************************************************** 54 // 55 // The following are defines for the bit fields in the CCM_O_CRCCTRL register. 56 // 57 //***************************************************************************** 58 #define CCM_CRCCTRL_INIT_M 0x00006000 // CRC Initialization 59 #define CCM_CRCCTRL_INIT_SEED 0x00000000 // Use the CRCSEED register context 60 // as the starting value 61 #define CCM_CRCCTRL_INIT_0 0x00004000 // Initialize to all '0s' 62 #define CCM_CRCCTRL_INIT_1 0x00006000 // Initialize to all '1s' 63 #define CCM_CRCCTRL_SIZE 0x00001000 // Input Data Size 64 #define CCM_CRCCTRL_RESINV 0x00000200 // Result Inverse Enable 65 #define CCM_CRCCTRL_OBR 0x00000100 // Output Reverse Enable 66 #define CCM_CRCCTRL_BR 0x00000080 // Bit reverse enable 67 #define CCM_CRCCTRL_ENDIAN_M 0x00000030 // Endian Control 68 #define CCM_CRCCTRL_ENDIAN_SBHW 0x00000000 // Configuration unchanged. (B3, 69 // B2, B1, B0) 70 #define CCM_CRCCTRL_ENDIAN_SHW 0x00000010 // Bytes are swapped in half-words 71 // but half-words are not swapped 72 // (B2, B3, B0, B1) 73 #define CCM_CRCCTRL_ENDIAN_SHWNB \ 74 0x00000020 // Half-words are swapped but bytes 75 // are not swapped in half-word. 76 // (B1, B0, B3, B2) 77 #define CCM_CRCCTRL_ENDIAN_SBSW 0x00000030 // Bytes are swapped in half-words 78 // and half-words are swapped. (B0, 79 // B1, B2, B3) 80 #define CCM_CRCCTRL_TYPE_M 0x0000000F // Operation Type 81 #define CCM_CRCCTRL_TYPE_P8055 0x00000000 // Polynomial 0x8005 82 #define CCM_CRCCTRL_TYPE_P1021 0x00000001 // Polynomial 0x1021 83 #define CCM_CRCCTRL_TYPE_P4C11DB7 \ 84 0x00000002 // Polynomial 0x4C11DB7 85 #define CCM_CRCCTRL_TYPE_P1EDC6F41 \ 86 0x00000003 // Polynomial 0x1EDC6F41 87 #define CCM_CRCCTRL_TYPE_TCPCHKSUM \ 88 0x00000008 // TCP checksum 89 90 //***************************************************************************** 91 // 92 // The following are defines for the bit fields in the CCM_O_CRCSEED register. 93 // 94 //***************************************************************************** 95 #define CCM_CRCSEED_SEED_M 0xFFFFFFFF // SEED/Context Value 96 #define CCM_CRCSEED_SEED_S 0 97 98 //***************************************************************************** 99 // 100 // The following are defines for the bit fields in the CCM_O_CRCDIN register. 101 // 102 //***************************************************************************** 103 #define CCM_CRCDIN_DATAIN_M 0xFFFFFFFF // Data Input 104 #define CCM_CRCDIN_DATAIN_S 0 105 106 //***************************************************************************** 107 // 108 // The following are defines for the bit fields in the CCM_O_CRCRSLTPP 109 // register. 110 // 111 //***************************************************************************** 112 #define CCM_CRCRSLTPP_RSLTPP_M 0xFFFFFFFF // Post Processing Result 113 #define CCM_CRCRSLTPP_RSLTPP_S 0 114 115 #endif // __HW_CCM_H__ 116