1 //***************************************************************************** 2 // 3 // hw_sysexc.h - Macros used when accessing the system exception module. 4 // 5 // Copyright (c) 2011-2017 Texas Instruments Incorporated. All rights reserved. 6 // Software License Agreement 7 // 8 // Redistribution and use in source and binary forms, with or without 9 // modification, are permitted provided that the following conditions 10 // are met: 11 // 12 // Redistributions of source code must retain the above copyright 13 // notice, this list of conditions and the following disclaimer. 14 // 15 // Redistributions in binary form must reproduce the above copyright 16 // notice, this list of conditions and the following disclaimer in the 17 // documentation and/or other materials provided with the 18 // distribution. 19 // 20 // Neither the name of Texas Instruments Incorporated nor the names of 21 // its contributors may be used to endorse or promote products derived 22 // from this software without specific prior written permission. 23 // 24 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 25 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 26 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 27 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 28 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 29 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 30 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 34 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 // 36 // This is part of revision 2.1.4.178 of the Tiva Firmware Development Package. 37 // 38 //***************************************************************************** 39 40 #ifndef __HW_SYSEXC_H__ 41 #define __HW_SYSEXC_H__ 42 43 //***************************************************************************** 44 // 45 // The following are defines for the System Exception Module register 46 // addresses. 47 // 48 //***************************************************************************** 49 #define SYSEXC_RIS 0x400F9000 // System Exception Raw Interrupt 50 // Status 51 #define SYSEXC_IM 0x400F9004 // System Exception Interrupt Mask 52 #define SYSEXC_MIS 0x400F9008 // System Exception Masked 53 // Interrupt Status 54 #define SYSEXC_IC 0x400F900C // System Exception Interrupt Clear 55 56 //***************************************************************************** 57 // 58 // The following are defines for the bit fields in the SYSEXC_RIS register. 59 // 60 //***************************************************************************** 61 #define SYSEXC_RIS_FPIXCRIS 0x00000020 // Floating-Point Inexact Exception 62 // Raw Interrupt Status 63 #define SYSEXC_RIS_FPOFCRIS 0x00000010 // Floating-Point Overflow 64 // Exception Raw Interrupt Status 65 #define SYSEXC_RIS_FPUFCRIS 0x00000008 // Floating-Point Underflow 66 // Exception Raw Interrupt Status 67 #define SYSEXC_RIS_FPIOCRIS 0x00000004 // Floating-Point Invalid Operation 68 // Raw Interrupt Status 69 #define SYSEXC_RIS_FPDZCRIS 0x00000002 // Floating-Point Divide By 0 70 // Exception Raw Interrupt Status 71 #define SYSEXC_RIS_FPIDCRIS 0x00000001 // Floating-Point Input Denormal 72 // Exception Raw Interrupt Status 73 74 //***************************************************************************** 75 // 76 // The following are defines for the bit fields in the SYSEXC_IM register. 77 // 78 //***************************************************************************** 79 #define SYSEXC_IM_FPIXCIM 0x00000020 // Floating-Point Inexact Exception 80 // Interrupt Mask 81 #define SYSEXC_IM_FPOFCIM 0x00000010 // Floating-Point Overflow 82 // Exception Interrupt Mask 83 #define SYSEXC_IM_FPUFCIM 0x00000008 // Floating-Point Underflow 84 // Exception Interrupt Mask 85 #define SYSEXC_IM_FPIOCIM 0x00000004 // Floating-Point Invalid Operation 86 // Interrupt Mask 87 #define SYSEXC_IM_FPDZCIM 0x00000002 // Floating-Point Divide By 0 88 // Exception Interrupt Mask 89 #define SYSEXC_IM_FPIDCIM 0x00000001 // Floating-Point Input Denormal 90 // Exception Interrupt Mask 91 92 //***************************************************************************** 93 // 94 // The following are defines for the bit fields in the SYSEXC_MIS register. 95 // 96 //***************************************************************************** 97 #define SYSEXC_MIS_FPIXCMIS 0x00000020 // Floating-Point Inexact Exception 98 // Masked Interrupt Status 99 #define SYSEXC_MIS_FPOFCMIS 0x00000010 // Floating-Point Overflow 100 // Exception Masked Interrupt 101 // Status 102 #define SYSEXC_MIS_FPUFCMIS 0x00000008 // Floating-Point Underflow 103 // Exception Masked Interrupt 104 // Status 105 #define SYSEXC_MIS_FPIOCMIS 0x00000004 // Floating-Point Invalid Operation 106 // Masked Interrupt Status 107 #define SYSEXC_MIS_FPDZCMIS 0x00000002 // Floating-Point Divide By 0 108 // Exception Masked Interrupt 109 // Status 110 #define SYSEXC_MIS_FPIDCMIS 0x00000001 // Floating-Point Input Denormal 111 // Exception Masked Interrupt 112 // Status 113 114 //***************************************************************************** 115 // 116 // The following are defines for the bit fields in the SYSEXC_IC register. 117 // 118 //***************************************************************************** 119 #define SYSEXC_IC_FPIXCIC 0x00000020 // Floating-Point Inexact Exception 120 // Interrupt Clear 121 #define SYSEXC_IC_FPOFCIC 0x00000010 // Floating-Point Overflow 122 // Exception Interrupt Clear 123 #define SYSEXC_IC_FPUFCIC 0x00000008 // Floating-Point Underflow 124 // Exception Interrupt Clear 125 #define SYSEXC_IC_FPIOCIC 0x00000004 // Floating-Point Invalid Operation 126 // Interrupt Clear 127 #define SYSEXC_IC_FPDZCIC 0x00000002 // Floating-Point Divide By 0 128 // Exception Interrupt Clear 129 #define SYSEXC_IC_FPIDCIC 0x00000001 // Floating-Point Input Denormal 130 // Exception Interrupt Clear 131 132 #endif // __HW_SYSEXC_H__ 133