1 //*****************************************************************************
2 //
3 // crc.c - Driver for the CRC module.
4 //
5 // Copyright (c) 2012-2017 Texas Instruments Incorporated.  All rights reserved.
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35 //
36 // This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
37 //
38 //*****************************************************************************
39 
40 //*****************************************************************************
41 //
42 //! \addtogroup crc_api
43 //! @{
44 //
45 //*****************************************************************************
46 
47 #include <stdbool.h>
48 #include <stdint.h>
49 #include "inc/hw_ccm.h"
50 #include "inc/hw_memmap.h"
51 #include "inc/hw_types.h"
52 #include "driverlib/crc.h"
53 #include "driverlib/debug.h"
54 
55 
56 //*****************************************************************************
57 //
58 //! Set the configuration of CRC functionality with the EC module.
59 //!
60 //! \param ui32Base is the base address of the EC module.
61 //! \param ui32CRCConfig is the configuration of the CRC engine.
62 //!
63 //! This function configures the operation of the CRC engine within the EC
64 //! module.  The configuration is specified with the \e ui32CRCConfig argument.
65 //! It is the logical OR of any of the following options:
66 //!
67 //! CRC Initialization Value
68 //! - \b CRC_CFG_INIT_SEED - Initialize with seed value
69 //! - \b CRC_CFG_INIT_0 - Initialize to all '0s'
70 //! - \b CRC_CFG_INIT_1 - Initialize to all '1s'
71 //!
72 //! Input Data Size
73 //! - \b CRC_CFG_SIZE_8BIT - Input data size of 8 bits
74 //! - \b CRC_CFG_SIZE_32BIT - Input data size of 32 bits
75 //!
76 //! Post Process Reverse/Inverse
77 //! - \b CRC_CFG_RESINV - Result inverse enable
78 //! - \b CRC_CFG_OBR - Output reverse enable
79 //!
80 //! Input Bit Reverse
81 //! - \b CRC_CFG_IBR - Bit reverse enable
82 //!
83 //! Endian Control
84 //! - \b CRC_CFG_ENDIAN_SBHW - Swap byte in half-word
85 //! - \b CRC_CFG_ENDIAN_SHW - Swap half-word
86 //!
87 //! Operation Type
88 //! - \b CRC_CFG_TYPE_P8005 - Polynomial 0x8005
89 //! - \b CRC_CFG_TYPE_P1021 - Polynomial 0x1021
90 //! - \b CRC_CFG_TYPE_P4C11DB7 - Polynomial 0x4C11DB7
91 //! - \b CRC_CFG_TYPE_P1EDC6F41 - Polynomial 0x1EDC6F41
92 //! - \b CRC_CFG_TYPE_TCPCHKSUM - TCP checksum
93 //!
94 //! \return None.
95 //
96 //*****************************************************************************
97 void
CRCConfigSet(uint32_t ui32Base,uint32_t ui32CRCConfig)98 CRCConfigSet(uint32_t ui32Base, uint32_t ui32CRCConfig)
99 {
100     //
101     // Check the arguments.
102     //
103     ASSERT(ui32Base == CCM0_BASE);
104     ASSERT((ui32CRCConfig & CRC_CFG_INIT_SEED) ||
105            (ui32CRCConfig & CRC_CFG_INIT_0) ||
106            (ui32CRCConfig & CRC_CFG_INIT_1) ||
107            (ui32CRCConfig & CRC_CFG_SIZE_8BIT) ||
108            (ui32CRCConfig & CRC_CFG_SIZE_32BIT) ||
109            (ui32CRCConfig & CRC_CFG_RESINV) ||
110            (ui32CRCConfig & CRC_CFG_OBR) ||
111            (ui32CRCConfig & CRC_CFG_IBR) ||
112            (ui32CRCConfig & CRC_CFG_ENDIAN_SBHW) ||
113            (ui32CRCConfig & CRC_CFG_ENDIAN_SHW) ||
114            (ui32CRCConfig & CRC_CFG_TYPE_P8005) ||
115            (ui32CRCConfig & CRC_CFG_TYPE_P1021) ||
116            (ui32CRCConfig & CRC_CFG_TYPE_P4C11DB7) ||
117            (ui32CRCConfig & CRC_CFG_TYPE_P1EDC6F41) ||
118            (ui32CRCConfig & CRC_CFG_TYPE_TCPCHKSUM));
119 
120     //
121     // Write the control register with the configuration.
122     //
123     HWREG(ui32Base + CCM_O_CRCCTRL) = ui32CRCConfig;
124 }
125 
126 //*****************************************************************************
127 //
128 //! Write the seed value for CRC operations in the EC module.
129 //!
130 //! \param ui32Base is the base address of the EC module.
131 //! \param ui32Seed is the seed value.
132 //!
133 //! This function writes the seed value for use with CRC operations in the
134 //! EC module.  This value is the start value for CRC operations.  If this
135 //! value is not written, then the residual seed from the previous operation
136 //! is used as the starting value.
137 //!
138 //! \note The seed must be written only if \b CRC_CFG_INIT_SEED is
139 //! set with the CRCConfigSet() function.
140 //
141 //*****************************************************************************
142 void
CRCSeedSet(uint32_t ui32Base,uint32_t ui32Seed)143 CRCSeedSet(uint32_t ui32Base, uint32_t ui32Seed)
144 {
145     //
146     // Check the arguments.
147     //
148     ASSERT(ui32Base == CCM0_BASE);
149 
150     //
151     // Write the seed value to the seed register.
152     //
153     HWREG(ui32Base + CCM_O_CRCSEED) = ui32Seed;
154 }
155 
156 //*****************************************************************************
157 //
158 //! Write data into the EC module for CRC operations.
159 //!
160 //! \param ui32Base is the base address of the EC module.
161 //! \param ui32Data is the data to be written.
162 //!
163 //! This function writes either 8 or 32 bits of data into the EC module for
164 //! CRC operations.  The distinction between 8 and 32 bits of data is made
165 //! when the \b CRC_CFG_SIZE_8BIT or \b CRC_CFG_SIZE_32BIT flag
166 //! is set using the CRCConfigSet() function.
167 //!
168 //! When writing 8 bits of data, ensure the data is in the least significant
169 //! byte position.  The remaining bytes should be written with zero.  For
170 //! example, when writing 0xAB, \e ui32Data should be 0x000000AB.
171 //!
172 //! \return None
173 //
174 //*****************************************************************************
175 void
CRCDataWrite(uint32_t ui32Base,uint32_t ui32Data)176 CRCDataWrite(uint32_t ui32Base, uint32_t ui32Data)
177 {
178     //
179     // Check the arguments.
180     //
181     ASSERT(ui32Base == CCM0_BASE);
182 
183     //
184     // Write the data
185     //
186     HWREG(ui32Base + CCM_O_CRCDIN) = ui32Data;
187 }
188 
189 //*****************************************************************************
190 //
191 //! Reads the result of a CRC operation in the EC module.
192 //!
193 //! \param ui32Base is the base address of the EC module.
194 //! \param bPPResult is \b true to read the post-processed result, or \b false
195 //! to read the unmodified result.
196 //!
197 //! This function reads either the unmodified CRC result or the post
198 //! processed CRC result from the EC module.  The post-processing options
199 //! are selectable through \b CRC_CFG_RESINV and \b CRC_CFG_OBR
200 //! parameters in the CRCConfigSet() function.
201 //!
202 //! \return The CRC result.
203 //
204 //*****************************************************************************
205 uint32_t
CRCResultRead(uint32_t ui32Base,bool bPPResult)206 CRCResultRead(uint32_t ui32Base, bool bPPResult)
207 {
208     //
209     // Check the arguments.
210     //
211     ASSERT(ui32Base == CCM0_BASE);
212 
213     //
214     // Depending on the value of bPPResult, read the appropriate register and
215     // return value.
216     //
217     if(bPPResult)
218     {
219         return(HWREG(ui32Base + CCM_O_CRCRSLTPP));
220     }
221     else
222     {
223         return(HWREG(ui32Base + CCM_O_CRCSEED));
224     }
225 }
226 
227 //*****************************************************************************
228 //
229 //! Process data to generate a CRC with the EC module.
230 //!
231 //! \param ui32Base is the base address of the EC module.
232 //! \param pui32DataIn is a pointer to an array of data that is processed.
233 //! \param ui32DataLength is the number of data items that are processed
234 //! to produce the CRC.
235 //! \param bPPResult is \b true to read the post-processed result, or \b false
236 //! to read the unmodified result.
237 //!
238 //! This function processes an array of data to produce a CRC result.
239 //!
240 //! The data in the array pointed to be \e pui32DataIn is either an array
241 //! of bytes or an array or words depending on the selection of the input
242 //! data size options \b CRC_CFG_SIZE_8BIT and
243 //! \b CRC_CFG_SIZE_32BIT.
244 //!
245 //! This function returns either the unmodified CRC result or the
246 //! post- processed CRC result from the EC module.  The post-processing
247 //! options are selectable through \b CRC_CFG_RESINV and
248 //! \b CRC_CFG_OBR parameters.
249 //!
250 //! \return The CRC result.
251 //
252 //*****************************************************************************
253 uint32_t
CRCDataProcess(uint32_t ui32Base,uint32_t * pui32DataIn,uint32_t ui32DataLength,bool bPPResult)254 CRCDataProcess(uint32_t ui32Base, uint32_t *pui32DataIn,
255                uint32_t ui32DataLength, bool bPPResult)
256 {
257     uint8_t *pui8DataIn;
258 
259     //
260     // Check the arguments.
261     //
262     ASSERT(ui32Base == CCM0_BASE);
263 
264     //
265     // See if the CRC is operating in 8-bit or 32-bit mode.
266     //
267     if(HWREG(ui32Base + CCM_O_CRCCTRL) & CCM_CRCCTRL_SIZE)
268     {
269         //
270         // The CRC is operating in 8-bit mode, so create an 8-bit pointer to
271         // the data.
272         //
273         pui8DataIn = (uint8_t *)pui32DataIn;
274 
275         //
276         // Loop through the input data.
277         //
278         while(ui32DataLength--)
279         {
280             //
281             // Write the next data byte.
282             //
283             HWREG(ui32Base + CCM_O_CRCDIN) = *pui8DataIn++;
284         }
285     }
286     else
287     {
288         //
289         // The CRC is operating in 32-bit mode, so loop through the input data.
290         //
291         while(ui32DataLength--)
292         {
293             //
294             // Write the next data word.
295             //
296             HWREG(ui32Base + CCM_O_CRCDIN) = *pui32DataIn++;
297         }
298     }
299 
300     //
301     // Return the result.
302     //
303     return(CRCResultRead(ui32Base, bPPResult));
304 }
305 
306 //*****************************************************************************
307 //
308 // Close the Doxygen group.
309 //! @}
310 //
311 //*****************************************************************************
312