1; <<< Use Configuration Wizard in Context Menu >>>
2;******************************************************************************
3;
4; startup_rvmdk.S - Startup code for use with Keil's uVision.
5;
6; Copyright (c) 2012-2017 Texas Instruments Incorporated.  All rights reserved.
7; Software License Agreement
8;
9; Texas Instruments (TI) is supplying this software for use solely and
10; exclusively on TI's microcontroller products. The software is owned by
11; TI and/or its suppliers, and is protected under applicable copyright
12; laws. You may not combine this software with "viral" open-source
13; software in order to form a larger program.
14;
15; THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
16; NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
17; NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
18; A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
19; CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
20; DAMAGES, FOR ANY REASON WHATSOEVER.
21;
22; This is part of revision 2.1.4.178 of the EK-TM4C123GXL Firmware Package.
23;
24;******************************************************************************
25
26;******************************************************************************
27;
28; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
29;
30;******************************************************************************
31Stack   EQU     0x00000200
32
33;******************************************************************************
34;
35; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
36;
37;******************************************************************************
38Heap    EQU     0x00000000
39
40;******************************************************************************
41;
42; Allocate space for the stack.
43;
44;******************************************************************************
45        AREA    STACK, NOINIT, READWRITE, ALIGN=3
46StackMem
47        SPACE   Stack
48__initial_sp
49
50;******************************************************************************
51;
52; Allocate space for the heap.
53;
54;******************************************************************************
55        AREA    HEAP, NOINIT, READWRITE, ALIGN=3
56__heap_base
57HeapMem
58        SPACE   Heap
59__heap_limit
60
61;******************************************************************************
62;
63; Indicate that the code in this file preserves 8-byte alignment of the stack.
64;
65;******************************************************************************
66        PRESERVE8
67
68;******************************************************************************
69;
70; Place code into the reset code section.
71;
72;******************************************************************************
73        AREA    RESET, CODE, READONLY
74        THUMB
75
76
77;******************************************************************************
78;
79; External declarations for the interrupt handlers used by the application.
80;
81;******************************************************************************
82        EXTERN  HardFault_Handler
83        EXTERN  PendSV_Handler
84        EXTERN  SysTick_Handler
85
86;******************************************************************************
87;
88; The vector table.
89;
90;******************************************************************************
91        EXPORT  __Vectors
92__Vectors
93        DCD     StackMem + Stack            ; Top of Stack
94        DCD     Reset_Handler               ; Reset Handler
95        DCD     NmiSR                       ; NMI Handler
96        DCD     HardFault_Handler                    ; Hard Fault Handler
97        DCD     IntDefaultHandler           ; The MPU fault handler
98        DCD     IntDefaultHandler           ; The bus fault handler
99        DCD     IntDefaultHandler           ; The usage fault handler
100        DCD     0                           ; Reserved
101        DCD     0                           ; Reserved
102        DCD     0                           ; Reserved
103        DCD     0                           ; Reserved
104        DCD     IntDefaultHandler           ; SVCall handler
105        DCD     IntDefaultHandler           ; Debug monitor handler
106        DCD     0                           ; Reserved
107        DCD     PendSV_Handler           ; The PendSV handler
108        DCD     SysTick_Handler           ; The SysTick handler
109        DCD     IntDefaultHandler           ; GPIO Port A
110        DCD     IntDefaultHandler           ; GPIO Port B
111        DCD     IntDefaultHandler           ; GPIO Port C
112        DCD     IntDefaultHandler           ; GPIO Port D
113        DCD     IntDefaultHandler           ; GPIO Port E
114        DCD     UART0IntHandler             ; UART0 Rx and Tx
115        DCD     UART1IntHandler             ; UART1 Rx and Tx
116        DCD     IntDefaultHandler           ; SSI0 Rx and Tx
117        DCD     IntDefaultHandler           ; I2C0 Master and Slave
118        DCD     IntDefaultHandler           ; PWM Fault
119        DCD     IntDefaultHandler           ; PWM Generator 0
120        DCD     IntDefaultHandler           ; PWM Generator 1
121        DCD     IntDefaultHandler           ; PWM Generator 2
122        DCD     IntDefaultHandler           ; Quadrature Encoder 0
123        DCD     IntDefaultHandler           ; ADC Sequence 0
124        DCD     IntDefaultHandler           ; ADC Sequence 1
125        DCD     IntDefaultHandler           ; ADC Sequence 2
126        DCD     IntDefaultHandler           ; ADC Sequence 3
127        DCD     IntDefaultHandler           ; Watchdog timer
128        DCD     IntDefaultHandler           ; Timer 0 subtimer A
129        DCD     IntDefaultHandler           ; Timer 0 subtimer B
130        DCD     IntDefaultHandler           ; Timer 1 subtimer A
131        DCD     IntDefaultHandler           ; Timer 1 subtimer B
132        DCD     IntDefaultHandler           ; Timer 2 subtimer A
133        DCD     IntDefaultHandler           ; Timer 2 subtimer B
134        DCD     IntDefaultHandler           ; Analog Comparator 0
135        DCD     IntDefaultHandler           ; Analog Comparator 1
136        DCD     IntDefaultHandler           ; Analog Comparator 2
137        DCD     IntDefaultHandler           ; System Control (PLL, OSC, BO)
138        DCD     IntDefaultHandler           ; FLASH Control
139        DCD     IntDefaultHandler           ; GPIO Port F
140        DCD     IntDefaultHandler           ; GPIO Port G
141        DCD     IntDefaultHandler           ; GPIO Port H
142        DCD     IntDefaultHandler           ; UART2 Rx and Tx
143        DCD     IntDefaultHandler           ; SSI1 Rx and Tx
144        DCD     IntDefaultHandler           ; Timer 3 subtimer A
145        DCD     IntDefaultHandler           ; Timer 3 subtimer B
146        DCD     IntDefaultHandler           ; I2C1 Master and Slave
147        DCD     IntDefaultHandler           ; Quadrature Encoder 1
148        DCD     IntDefaultHandler           ; CAN0
149        DCD     IntDefaultHandler           ; CAN1
150        DCD     0                           ; Reserved
151        DCD     0                           ; Reserved
152        DCD     IntDefaultHandler           ; Hibernate
153        DCD     IntDefaultHandler           ; USB0
154        DCD     IntDefaultHandler           ; PWM Generator 3
155        DCD     IntDefaultHandler           ; uDMA Software Transfer
156        DCD     IntDefaultHandler           ; uDMA Error
157        DCD     IntDefaultHandler           ; ADC1 Sequence 0
158        DCD     IntDefaultHandler           ; ADC1 Sequence 1
159        DCD     IntDefaultHandler           ; ADC1 Sequence 2
160        DCD     IntDefaultHandler           ; ADC1 Sequence 3
161        DCD     0                           ; Reserved
162        DCD     0                           ; Reserved
163        DCD     IntDefaultHandler           ; GPIO Port J
164        DCD     IntDefaultHandler           ; GPIO Port K
165        DCD     IntDefaultHandler           ; GPIO Port L
166        DCD     IntDefaultHandler           ; SSI2 Rx and Tx
167        DCD     IntDefaultHandler           ; SSI3 Rx and Tx
168        DCD     IntDefaultHandler           ; UART3 Rx and Tx
169        DCD     IntDefaultHandler           ; UART4 Rx and Tx
170        DCD     IntDefaultHandler           ; UART5 Rx and Tx
171        DCD     IntDefaultHandler           ; UART6 Rx and Tx
172        DCD     IntDefaultHandler           ; UART7 Rx and Tx
173        DCD     0                           ; Reserved
174        DCD     0                           ; Reserved
175        DCD     0                           ; Reserved
176        DCD     0                           ; Reserved
177        DCD     IntDefaultHandler           ; I2C2 Master and Slave
178        DCD     IntDefaultHandler           ; I2C3 Master and Slave
179        DCD     IntDefaultHandler           ; Timer 4 subtimer A
180        DCD     IntDefaultHandler           ; Timer 4 subtimer B
181        DCD     0                           ; Reserved
182        DCD     0                           ; Reserved
183        DCD     0                           ; Reserved
184        DCD     0                           ; Reserved
185        DCD     0                           ; Reserved
186        DCD     0                           ; Reserved
187        DCD     0                           ; Reserved
188        DCD     0                           ; Reserved
189        DCD     0                           ; Reserved
190        DCD     0                           ; Reserved
191        DCD     0                           ; Reserved
192        DCD     0                           ; Reserved
193        DCD     0                           ; Reserved
194        DCD     0                           ; Reserved
195        DCD     0                           ; Reserved
196        DCD     0                           ; Reserved
197        DCD     0                           ; Reserved
198        DCD     0                           ; Reserved
199        DCD     0                           ; Reserved
200        DCD     0                           ; Reserved
201        DCD     IntDefaultHandler           ; Timer 5 subtimer A
202        DCD     IntDefaultHandler           ; Timer 5 subtimer B
203        DCD     IntDefaultHandler           ; Wide Timer 0 subtimer A
204        DCD     IntDefaultHandler           ; Wide Timer 0 subtimer B
205        DCD     IntDefaultHandler           ; Wide Timer 1 subtimer A
206        DCD     IntDefaultHandler           ; Wide Timer 1 subtimer B
207        DCD     IntDefaultHandler           ; Wide Timer 2 subtimer A
208        DCD     IntDefaultHandler           ; Wide Timer 2 subtimer B
209        DCD     IntDefaultHandler           ; Wide Timer 3 subtimer A
210        DCD     IntDefaultHandler           ; Wide Timer 3 subtimer B
211        DCD     IntDefaultHandler           ; Wide Timer 4 subtimer A
212        DCD     IntDefaultHandler           ; Wide Timer 4 subtimer B
213        DCD     IntDefaultHandler           ; Wide Timer 5 subtimer A
214        DCD     IntDefaultHandler           ; Wide Timer 5 subtimer B
215        DCD     IntDefaultHandler           ; FPU
216        DCD     0                           ; Reserved
217        DCD     0                           ; Reserved
218        DCD     IntDefaultHandler           ; I2C4 Master and Slave
219        DCD     IntDefaultHandler           ; I2C5 Master and Slave
220        DCD     IntDefaultHandler           ; GPIO Port M
221        DCD     IntDefaultHandler           ; GPIO Port N
222        DCD     IntDefaultHandler           ; Quadrature Encoder 2
223        DCD     0                           ; Reserved
224        DCD     0                           ; Reserved
225        DCD     IntDefaultHandler           ; GPIO Port P (Summary or P0)
226        DCD     IntDefaultHandler           ; GPIO Port P1
227        DCD     IntDefaultHandler           ; GPIO Port P2
228        DCD     IntDefaultHandler           ; GPIO Port P3
229        DCD     IntDefaultHandler           ; GPIO Port P4
230        DCD     IntDefaultHandler           ; GPIO Port P5
231        DCD     IntDefaultHandler           ; GPIO Port P6
232        DCD     IntDefaultHandler           ; GPIO Port P7
233        DCD     IntDefaultHandler           ; GPIO Port Q (Summary or Q0)
234        DCD     IntDefaultHandler           ; GPIO Port Q1
235        DCD     IntDefaultHandler           ; GPIO Port Q2
236        DCD     IntDefaultHandler           ; GPIO Port Q3
237        DCD     IntDefaultHandler           ; GPIO Port Q4
238        DCD     IntDefaultHandler           ; GPIO Port Q5
239        DCD     IntDefaultHandler           ; GPIO Port Q6
240        DCD     IntDefaultHandler           ; GPIO Port Q7
241        DCD     IntDefaultHandler           ; GPIO Port R
242        DCD     IntDefaultHandler           ; GPIO Port S
243        DCD     IntDefaultHandler           ; PWM 1 Generator 0
244        DCD     IntDefaultHandler           ; PWM 1 Generator 1
245        DCD     IntDefaultHandler           ; PWM 1 Generator 2
246        DCD     IntDefaultHandler           ; PWM 1 Generator 3
247        DCD     IntDefaultHandler           ; PWM 1 Fault
248
249;******************************************************************************
250;
251; This is the code that gets called when the processor first starts execution
252; following a reset event.
253;
254;******************************************************************************
255        EXPORT  Reset_Handler
256Reset_Handler
257        ;
258        ; Enable the floating-point unit.  This must be done here to handle the
259        ; case where main() uses floating-point and the function prologue saves
260        ; floating-point registers (which will fault if floating-point is not
261        ; enabled).  Any configuration of the floating-point unit using
262        ; DriverLib APIs must be done here prior to the floating-point unit
263        ; being enabled.
264        ;
265        ; Note that this does not use DriverLib since it might not be included
266        ; in this project.
267        ;
268        MOVW    R0, #0xED88
269        MOVT    R0, #0xE000
270        LDR     R1, [R0]
271        ORR     R1, #0x00F00000
272        STR     R1, [R0]
273
274        ;
275        ; Call the C library enty point that handles startup.  This will copy
276        ; the .data section initializers from flash to SRAM and zero fill the
277        ; .bss section.
278        ;
279        IMPORT  __main
280        B       __main
281
282;******************************************************************************
283;
284; This is the code that gets called when the processor receives a NMI.  This
285; simply enters an infinite loop, preserving the system state for examination
286; by a debugger.
287;
288;******************************************************************************
289NmiSR
290        B       NmiSR
291
292;******************************************************************************
293;
294; This is the code that gets called when the processor receives a fault
295; interrupt.  This simply enters an infinite loop, preserving the system state
296; for examination by a debugger.
297;
298;******************************************************************************
299FaultISR
300        B       FaultISR
301
302;******************************************************************************
303;
304; This is the code that gets called when the processor receives an unexpected
305; interrupt.  This simply enters an infinite loop, preserving the system state
306; for examination by a debugger.
307;
308;******************************************************************************
309IntDefaultHandler
310        B       IntDefaultHandler
311
312
313Default_Handler PROC
314
315                EXPORT  UART0IntHandler            [WEAK]
316                EXPORT  UART1IntHandler            [WEAK]
317
318UART0IntHandler             ; UART0 Rx and Tx
319UART1IntHandler             ; UART1 Rx and Tx
320       B Default_Handler
321                ENDP
322
323
324;******************************************************************************
325;
326; Make sure the end of this section is aligned.
327;
328;******************************************************************************
329        ALIGN
330
331;******************************************************************************
332;
333; Some code in the normal code section for initializing the heap and stack.
334;
335;******************************************************************************
336        AREA    |.text|, CODE, READONLY
337
338;******************************************************************************
339;
340; The function expected of the C library startup code for defining the stack
341; and heap memory locations.  For the C library version of the startup code,
342; provide this function so that the C library initialization code can find out
343; the location of the stack and heap.
344;
345;******************************************************************************
346    IF :DEF: __MICROLIB
347        EXPORT  __initial_sp
348        EXPORT  __heap_base
349        EXPORT  __heap_limit
350    ELSE
351        IMPORT  __use_two_region_memory
352        EXPORT  __user_initial_stackheap
353__user_initial_stackheap
354        LDR     R0, =HeapMem
355        LDR     R1, =(StackMem + Stack)
356        LDR     R2, =(HeapMem + Heap)
357        LDR     R3, =StackMem
358        BX      LR
359    ENDIF
360
361;******************************************************************************
362;
363; Make sure the end of this section is aligned.
364;
365;******************************************************************************
366        ALIGN
367
368;******************************************************************************
369;
370; Tell the assembler that we're done.
371;
372;******************************************************************************
373        END
374