1 //***************************************************************************** 2 // 3 // lcd.h - Defines and Macros for the LCD Controller module. 4 // 5 // Copyright (c) 2012-2020 Texas Instruments Incorporated. All rights reserved. 6 // Software License Agreement 7 // 8 // Redistribution and use in source and binary forms, with or without 9 // modification, are permitted provided that the following conditions 10 // are met: 11 // 12 // Redistributions of source code must retain the above copyright 13 // notice, this list of conditions and the following disclaimer. 14 // 15 // Redistributions in binary form must reproduce the above copyright 16 // notice, this list of conditions and the following disclaimer in the 17 // documentation and/or other materials provided with the 18 // distribution. 19 // 20 // Neither the name of Texas Instruments Incorporated nor the names of 21 // its contributors may be used to endorse or promote products derived 22 // from this software without specific prior written permission. 23 // 24 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 25 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 26 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 27 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 28 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 29 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 30 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 34 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 // 36 // This is part of revision 2.2.0.295 of the Tiva Peripheral Driver Library. 37 // 38 //***************************************************************************** 39 40 #ifndef __DRIVERLIB_LCD_H__ 41 #define __DRIVERLIB_LCD_H__ 42 43 //***************************************************************************** 44 // 45 //! \addtogroup lcd_api 46 //! @{ 47 // 48 //***************************************************************************** 49 50 //***************************************************************************** 51 // 52 // If building with a C++ compiler, make all of the definitions in this header 53 // have a C binding. 54 // 55 //***************************************************************************** 56 #ifdef __cplusplus 57 extern "C" 58 { 59 #endif 60 61 //***************************************************************************** 62 // 63 //! This macro can be used to convert a 24-bit RGB color value as used by the 64 //! TivaWare Graphics Library into a 12-bit LCD controller color palette 65 //! entry. 66 // 67 //***************************************************************************** 68 #define PAL_FROM_RGB(ui32RGBColor) (((ui32RGBColor & 0xF0) >> 4) | \ 69 ((ui32RGBColor & 0xF000) >> 8) | \ 70 ((ui32RGBColor & 0xF00000) >> 12)) 71 72 //***************************************************************************** 73 // 74 //! This macro can be used to convert from time in microseconds to periods of 75 //! the supplied clock in Hertz as required when setting up the LIDD and raster 76 //! timing structures. The calculation will round such that the number of 77 //! cycles returned represents no longer a time than specified in the 78 //! ui32Time_uS parameter. Values of ui32Time_uS less than or equal to 79 //! 4294967uS (4.29 seconds) are supported by the macro. Larger values will 80 //! cause arithmetic overflow and yield incorrect values. It is further 81 //! assumed that ui32ClockFreq is a non-zero multiple of 1000000 (1MHz). 82 // 83 //***************************************************************************** 84 #define CYCLES_FROM_TIME_US(ui32ClockFreq, ui32Time_uS) \ 85 (((ui32Time_uS) == 0) ? 0 : \ 86 (((ui32ClockFreq) / 1000000) * ((((ui32Time_uS) * 1000) - 1) / 1000)) + 1) 87 88 //***************************************************************************** 89 // 90 //! This macro can be used to convert from time in nanoseconds to periods of 91 //! the supplied clock in Hertz as required when setting up the LIDD and raster 92 //! timing structures. The calculation will round such that the number of 93 //! cycles returned represents no longer a time than specified in the 94 //! ui32Time_nS parameter. Values of ui32Time_nS less than or equal to 95 //! 35791394 (35.79 milliseconds) are supported by the macro. Larger values 96 //! will cause arithmetic overflow and yield incorrect values. It is further 97 //! assumed that ui32ClockFreq is a non-zero multiple of 1000000 (1MHz). 98 // 99 //***************************************************************************** 100 #define CYCLES_FROM_TIME_NS(ui32ClockFreq, ui32Time_nS) \ 101 (((ui32Time_nS) == 0) ? 0 : \ 102 ((((((ui32ClockFreq) / 1000000) * ((ui32Time_nS) - 1)) / 1000)) + 1)) 103 104 //***************************************************************************** 105 // 106 //! A structure containing timing parameters for the LIDD (LCD Interface 107 //! Display Driver) interface. This is used with the LCDIDDTimingSet function. 108 // 109 //***************************************************************************** 110 typedef struct 111 { 112 // 113 //! Write Strobe Set-Up cycles. When performing a write access, this 114 //! field defines the number of MCLK cycles that Data Bus/Pad Output 115 //! Enable, ALE, the Direction bit, and Chip Select have to be ready before 116 //! the Write Strobe is asserted. Valid values are from 0 to 31. 117 // 118 uint8_t ui8WSSetup; 119 120 // 121 //! Write Strobe Duration cycles. Field value defines the number of MCLK 122 //! cycles for which the Write Strobe is held active when performing a 123 //! write access. Valid values are from 1 to 63. 124 // 125 uint8_t ui8WSDuration; 126 127 // 128 //! Write Strobe Hold cycles. Field value defines the number of MCLK 129 //! cycles for which Data Bus/Pad Output Enable, ALE, the Direction bit, 130 //! and Chip Select are held after the Write Strobe is deasserted when 131 //! performing a write access. Valid values are from 1 to 15. 132 // 133 uint8_t ui8WSHold; 134 135 // 136 //! Read Strobe Set-Up cycles. When performing a read access, this field 137 //! defines the number of MCLK cycles that Data Bus/Pad Output Enable, ALE, 138 //! the Direction bit, and Chip Select have to be ready before the Read 139 //! Strobe is asserted. Valid values are from 0 to 31. 140 // 141 uint8_t ui8RSSetup; 142 143 // 144 //! Read Strobe Duration cycles. Field value defines the number of MCLK 145 //! cycles for which the Read Strobe is held active when performing a read 146 //! access. Valid values are from 1 to 63. 147 // 148 uint8_t ui8RSDuration; 149 150 // 151 //! Read Strobe Hold cycles. Field value defines the number of MCLK cycles 152 //! for which Data Bus/Pad Output Enable, ALE, the Direction bit, and Chip 153 //! Select are held after the Read Strobe is deasserted when performing a 154 //! read access. Valid values are from 1 to 15. 155 // 156 uint8_t ui8RSHold; 157 158 // 159 //! Field value defines the number of MCLK cycles between the end of one 160 //! device access and the start of another device access using the same 161 //! Chip Select unless the two accesses are both Reads. In this case, 162 //! this delay is not incurred. Valid vales are from 1 to 4. 163 // 164 uint8_t ui8DelayCycles; 165 } 166 tLCDIDDTiming; 167 168 // 169 // Values which can be ORed together within the ui32Flags field of the 170 // tLCDRasterTiming structure. 171 // 172 #define RASTER_TIMING_SYNCS_OPPOSITE_PIXCLK \ 173 0x00000000 174 #define RASTER_TIMING_SYNCS_ON_RISING_PIXCLK \ 175 0x02000000 176 #define RASTER_TIMING_SYNCS_ON_FALLING_PIXCLK \ 177 0x03000000 178 #define RASTER_TIMING_ACTIVE_HIGH_OE \ 179 0x00000000 180 #define RASTER_TIMING_ACTIVE_LOW_OE \ 181 0x00800000 182 #define RASTER_TIMING_ACTIVE_HIGH_PIXCLK \ 183 0x00000000 184 #define RASTER_TIMING_ACTIVE_LOW_PIXCLK \ 185 0x00400000 186 #define RASTER_TIMING_ACTIVE_HIGH_HSYNC \ 187 0x00000000 188 #define RASTER_TIMING_ACTIVE_LOW_HSYNC \ 189 0x00200000 190 #define RASTER_TIMING_ACTIVE_HIGH_VSYNC \ 191 0x00000000 192 #define RASTER_TIMING_ACTIVE_LOW_VSYNC \ 193 0x00100000 194 195 // 196 //! A structure containing timing parameters for the raster interface. This is 197 //! used with the LCDRasterTimingSet function. 198 // 199 typedef struct 200 { 201 // 202 //! Flags configuring the polarity and active edges of the various signals 203 //! in the raster interface. This field is comprised of a logical OR of 204 //! the labels with prefix ``RASTER_TIMING_''. 205 // 206 uint32_t ui32Flags; 207 208 // 209 //! The number of pixels contained within each line on the LCD display. 210 //! Valid values are multiple of 16 less than or equal to 2048. 211 // 212 uint16_t ui16PanelWidth; 213 214 // 215 //! The number of lines on the LCD display. Valid values are from 1 to 216 //! 2048. 217 // 218 uint16_t ui16PanelHeight; 219 220 // 221 //! A value from 1 to 1024 that specifies the number of pixel clock periods 222 //! to add to the end of each line after active video has ended. 223 // 224 uint16_t ui16HFrontPorch; 225 226 // 227 //! A value from 1 to 1024 that specifies the number of pixel clock periods 228 //! to add to the beginning of a line before active video is asserted. 229 // 230 uint16_t ui16HBackPorch; 231 232 // 233 //! A value from 1 to 1024 that specifies the number of pixel clock periods 234 //! to pulse the line clock at the end of each line. 235 // 236 uint16_t ui16HSyncWidth; 237 238 // 239 //! A value from 0 to 255 that specifies the number of line clock periods 240 //! to add to the end of each frame after the last active line. 241 // 242 uint8_t ui8VFrontPorch; 243 244 // 245 //! A value from 0 to 255 that specifies the number of line clock periods 246 //! to add to the beginning of a frame before the first active line is 247 //! output to the display. 248 // 249 uint8_t ui8VBackPorch; 250 251 // 252 //! In active mode, a value from 1 to 64 that specifies the number of 253 //! line clock periods to set the lcd_fp pin active at the end of each 254 //! frame after the vertical front porch period elapses. The number of 255 //! The frame clock is used as the VSYNC signal in active mode. 256 //! 257 //! In passive mode, a value from 1 to 64 that specifies the number of 258 //! extra line clock periods to insert after the vertical front porch 259 //! period has elapsed. Note that the width of lcd_fp is not affected by 260 //! this value in passive mode. 261 // 262 uint8_t ui8VSyncWidth; 263 264 // 265 //! A value from 0 to 255 that specifies the number of line clocks to 266 //! count before transitioning the AC Bias pin. This pin is used to 267 //! periodically invert the polarity of the power supply to prevent DC 268 //! charge build-up within the display. 269 // 270 uint8_t ui8ACBiasLineCount; 271 } 272 tLCDRasterTiming; 273 274 //***************************************************************************** 275 // 276 // Possible values for the ui8Mode parameter to LCDModeSet(). The label 277 // LCD_MODE_AUTO_UFLOW_RESTART may be ORed with either of the other two. 278 // 279 //***************************************************************************** 280 #define LCD_MODE_LIDD ((uint8_t)0x00) 281 #define LCD_MODE_RASTER ((uint8_t)0x01) 282 #define LCD_MODE_AUTO_UFLOW_RESTART \ 283 ((uint8_t)0x02) 284 285 //***************************************************************************** 286 // 287 // Values used to construct the ui32Config parameter to LCDIDDConfigSet(). 288 // 289 //***************************************************************************** 290 #define LIDD_CONFIG_SYNC_MPU68 0x00000000 291 #define LIDD_CONFIG_ASYNC_MPU68 0x00000001 292 #define LIDD_CONFIG_SYNC_MPU80 0x00000002 293 #define LIDD_CONFIG_ASYNC_MPU80 0x00000003 294 #define LIDD_CONFIG_ASYNC_HITACHI \ 295 0x00000004 296 #define LIDD_CONFIG_INVERT_ALE 0x00000008 297 #define LIDD_CONFIG_INVERT_RS_EN \ 298 0x00000010 299 #define LIDD_CONFIG_INVERT_WS_DIR \ 300 0x00000020 301 #define LIDD_CONFIG_INVERT_CS0 0x00000040 302 #define LIDD_CONFIG_INVERT_CS1 0x00000080 303 304 //***************************************************************************** 305 // 306 // Values used to construct the ui32Config parameter to 307 // LCDRasterConfigSet(). Valid parameters contain one of the RASTER_FMT_xxx 308 // labels optionally ORed with the other flags. Only one of 309 // RASTER_LOAD_DATA_ONLY and RASTER_LOAD_PALETTE_ONLY may be specified (if 310 // neither is specified, the controller will load both palette and data when 311 // scanning out the frame buffer). 312 // 313 //***************************************************************************** 314 #define RASTER_FMT_ACTIVE_24BPP_PACKED \ 315 0x02000080 316 #define RASTER_FMT_ACTIVE_24BPP_UNPACKED \ 317 0x06000080 318 #define RASTER_FMT_ACTIVE_PALETTIZED_12BIT \ 319 0x00000080 320 #define RASTER_FMT_ACTIVE_PALETTIZED_16BIT \ 321 0x00800080 322 #define RASTER_FMT_PASSIVE_MONO_4PIX \ 323 0x00000002 324 #define RASTER_FMT_PASSIVE_MONO_8PIX \ 325 0x00000202 326 #define RASTER_FMT_PASSIVE_PALETTIZED \ 327 0x00000000 328 #define RASTER_FMT_PASSIVE_COLOR_12BIT \ 329 0x00000000 330 #define RASTER_FMT_PASSIVE_COLOR_16BIT \ 331 0x01000000 332 #define RASTER_ACTVID_DURING_BLANK \ 333 0x08000000 334 #define RASTER_NIBBLE_MODE_ENABLED \ 335 0x00400000 336 #define RASTER_LOAD_DATA_ONLY 0x00200000 337 #define RASTER_LOAD_PALETTE_ONLY \ 338 0x00100000 339 #define RASTER_READ_ORDER_REVERSED \ 340 0x00000100 341 342 //***************************************************************************** 343 // 344 // Interrupt sources for the LCD controller. These may be ORed together and 345 // passed to LCDIntEnable(), LCDIntDisable() and LCDIntClear(). They are also 346 // returned by LCDIntStatus(). 347 // 348 //***************************************************************************** 349 #define LCD_INT_DMA_DONE 0x00000001 350 #define LCD_INT_RASTER_FRAME_DONE \ 351 0x00000002 352 #define LCD_INT_SYNC_LOST 0x00000004 353 #define LCD_INT_AC_BIAS_CNT 0x00000008 354 #define LCD_INT_UNDERFLOW 0x00000020 355 #define LCD_INT_PAL_LOAD 0x00000040 356 #define LCD_INT_EOF0 0x00000100 357 #define LCD_INT_EOF1 0x00000200 358 359 //***************************************************************************** 360 // 361 // Configuration values used with LCDDMAConfigSet(). 362 // 363 //***************************************************************************** 364 #define LCD_DMA_FIFORDY_8_WORDS 0x00000000 365 #define LCD_DMA_FIFORDY_16_WORDS \ 366 0x00000100 367 #define LCD_DMA_FIFORDY_32_WORDS \ 368 0x00000200 369 #define LCD_DMA_FIFORDY_64_WORDS \ 370 0x00000300 371 #define LCD_DMA_FIFORDY_128_WORDS \ 372 0x00000400 373 #define LCD_DMA_FIFORDY_256_WORDS \ 374 0x00000500 375 #define LCD_DMA_FIFORDY_512_WORDS \ 376 0x00000600 377 #define LCD_DMA_BURST_1 0x00000010 378 #define LCD_DMA_BURST_2 0x00000010 379 #define LCD_DMA_BURST_4 0x00000020 380 #define LCD_DMA_BURST_8 0x00000030 381 #define LCD_DMA_BURST_16 0x00000040 382 #define LCD_DMA_BYTE_ORDER_0123 0x00000000 383 #define LCD_DMA_BYTE_ORDER_1023 0x00000008 384 #define LCD_DMA_BYTE_ORDER_3210 0x00000002 385 #define LCD_DMA_BYTE_ORDER_2301 0x0000000A 386 #define LCD_DMA_PING_PONG 0x00000001 387 388 //***************************************************************************** 389 // 390 // Type values used with LCDRasterPaletteSet(). 391 // 392 //***************************************************************************** 393 #define LCD_PALETTE_TYPE_1BPP 0x00000000 394 #define LCD_PALETTE_TYPE_2BPP 0x00001000 395 #define LCD_PALETTE_TYPE_4BPP 0x00002000 396 #define LCD_PALETTE_TYPE_8BPP 0x00003000 397 #define LCD_PALETTE_TYPE_DIRECT 0x00004000 398 #define LCD_PALETTE_SRC_24BIT 0x80000000 399 400 //***************************************************************************** 401 // 402 // Flags used in the ui32Clocks parameter to LCDClockReset(). 403 // 404 //***************************************************************************** 405 #define LCD_CLOCK_MAIN 0x00000008 406 #define LCD_CLOCK_DMA 0x00000004 407 #define LCD_CLOCK_LIDD 0x00000002 408 #define LCD_CLOCK_CORE 0x00000001 409 410 //***************************************************************************** 411 // 412 // Flags used in with LCDSubPanelConfigSet(). 413 // 414 //***************************************************************************** 415 #define LCD_SUBPANEL_AT_TOP 0x20000000 416 #define LCD_SUBPANEL_AT_BOTTOM 0x00000000 417 418 //***************************************************************************** 419 // 420 // Close the Doxygen group. 421 //! @} 422 // 423 //***************************************************************************** 424 425 //***************************************************************************** 426 // 427 // Function Prototypes. 428 // 429 //***************************************************************************** 430 extern uint32_t LCDModeSet(uint32_t ui32Base, uint8_t ui8Mode, 431 uint32_t ui32PixClk, uint32_t ui32SysClk); 432 extern void LCDClockReset(uint32_t ui32Base, uint32_t ui32Clocks); 433 extern void LCDIDDConfigSet(uint32_t ui32Base, uint32_t ui32Config); 434 extern void LCDIDDTimingSet(uint32_t ui32Base, uint32_t ui32CS, 435 const tLCDIDDTiming *pTiming); 436 extern void LCDIDDDMADisable(uint32_t ui32Base); 437 extern void LCDIDDCommandWrite(uint32_t ui32Base, uint32_t ui32CS, 438 uint16_t ui16Cmd); 439 extern void LCDIDDDataWrite(uint32_t ui32Base, uint32_t ui32CS, 440 uint16_t ui16Data); 441 extern void LCDIDDIndexedWrite(uint32_t ui32Base, uint32_t ui32CS, 442 uint16_t ui16Addr, uint16_t ui16Data); 443 extern uint16_t LCDIDDStatusRead(uint32_t ui32Base, uint32_t ui32CS); 444 extern uint16_t LCDIDDDataRead(uint32_t ui32Base, uint32_t ui32CS); 445 extern uint16_t LCDIDDIndexedRead(uint32_t ui32Base, uint32_t ui32CS, 446 uint16_t ui16Addr); 447 extern void LCDIDDDMAWrite(uint32_t ui32Base, uint32_t ui32CS, 448 const uint32_t *pui32Data, uint32_t ui32Count); 449 extern void LCDRasterConfigSet(uint32_t ui32Base, uint32_t ui32Config, 450 uint8_t ui8PalLoadDelay); 451 extern void LCDRasterTimingSet(uint32_t ui32Base, 452 const tLCDRasterTiming *pTiming); 453 extern void LCDRasterACBiasIntCountSet(uint32_t ui32Base, uint8_t ui8Count); 454 extern void LCDRasterEnable(uint32_t ui32Base); 455 extern bool LCDRasterEnabled(uint32_t ui32Base); 456 extern void LCDRasterDisable(uint32_t ui32Base); 457 extern void LCDRasterSubPanelConfigSet(uint32_t ui32Base, uint32_t ui32Flags, 458 uint32_t ui32BottomLines, 459 uint32_t ui32DefaultPixel); 460 extern void LCDRasterSubPanelEnable(uint32_t ui32Base); 461 extern void LCDRasterSubPanelDisable(uint32_t ui32Base); 462 extern void LCDDMAConfigSet(uint32_t ui32Base, uint32_t ui32Config); 463 extern void LCDRasterPaletteSet(uint32_t ui32Base, uint32_t ui32Type, 464 uint32_t *pui32PalAddr, 465 const uint32_t *pui32SrcColors, 466 uint32_t ui32Start, 467 uint32_t ui32Count); 468 extern void LCDRasterFrameBufferSet(uint32_t ui32Base, uint8_t ui8Buffer, 469 uint32_t *pui32Addr, 470 uint32_t ui32NumBytes); 471 extern void LCDIntEnable(uint32_t ui32Base, uint32_t ui32IntFlags); 472 extern void LCDIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags); 473 extern uint32_t LCDIntStatus(uint32_t ui32Base, bool bMasked); 474 extern void LCDIntClear(uint32_t ui32Base, uint32_t ui32IntFlags); 475 extern void LCDIntRegister(uint32_t ui32Base, void (*pfnHandler)(void)); 476 extern void LCDIntUnregister(uint32_t ui32Base); 477 478 //***************************************************************************** 479 // 480 // Mark the end of the C bindings section for C++ compilers. 481 // 482 //***************************************************************************** 483 #ifdef __cplusplus 484 } 485 #endif 486 487 #endif // __DRIVERLIB_LCD_H__ 488