1;/**************************************************************************//**
2; * @file     startup_ARMCM0.s
3; * @brief    CMSIS Core Device Startup File for
4; *           ARMCM0 Device Series
5; * @version  V1.08
6; * @date     23. November 2012
7; *
8; * @note
9; *
10; ******************************************************************************/
11;/* Copyright (c) 2011 - 2012 ARM LIMITED
12;
13;   All rights reserved.
14;   Redistribution and use in source and binary forms, with or without
15;   modification, are permitted provided that the following conditions are met:
16;   - Redistributions of source code must retain the above copyright
17;     notice, this list of conditions and the following disclaimer.
18;   - Redistributions in binary form must reproduce the above copyright
19;     notice, this list of conditions and the following disclaimer in the
20;     documentation and/or other materials provided with the distribution.
21;   - Neither the name of ARM nor the names of its contributors may be used
22;     to endorse or promote products derived from this software without
23;     specific prior written permission.
24;   *
25;   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26;   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27;   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28;   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
29;   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30;   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31;   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32;   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33;   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34;   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35;   POSSIBILITY OF SUCH DAMAGE.
36;   ---------------------------------------------------------------------------*/
37;/*
38;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
39;*/
40
41
42; <h> Stack Configuration
43;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
44; </h>
45
46Stack_Size      EQU     0x00000400
47
48                AREA    STACK, NOINIT, READWRITE, ALIGN=3
49Stack_Mem       SPACE   Stack_Size
50__initial_sp    EQU     0x20008000
51
52
53; <h> Heap Configuration
54;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
55; </h>
56
57Heap_Size       EQU     0x00000400
58
59                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
60__heap_base
61Heap_Mem        SPACE   Heap_Size
62__heap_limit
63
64
65                PRESERVE8
66                THUMB
67
68
69; Vector Table Mapped to Address 0 at Reset
70
71                AREA    RESET, DATA, READONLY
72                EXPORT  __Vectors
73                EXPORT  __Vectors_End
74                EXPORT  __Vectors_Size
75
76__Vectors       DCD     __initial_sp              ; Top of Stack
77                DCD     Reset_Handler             ; Reset Handler
78                DCD     NMI_Handler               ; NMI Handler
79                DCD     HardFault_Handler         ; Hard Fault Handler
80                DCD     0                         ; Reserved
81                DCD     0                         ; Reserved
82                DCD     0                         ; Reserved
83                DCD     0                         ; Reserved
84                DCD     0                         ; Reserved
85                DCD     0                         ; Reserved
86                DCD     0                         ; Reserved
87                DCD     SVC_Handler               ; SVCall Handler
88                DCD     0                         ; Reserved
89                DCD     0                         ; Reserved
90                DCD     PendSV_Handler            ; PendSV Handler
91                DCD     SysTick_Handler           ; SysTick Handler
92
93                ; External Interrupts
94                DCD     TMR0_IRQHandler           ;  0:  TMR0
95                DCD     GPIO_IRQHandler           ;  1:  GPIO
96                DCD     SLAVE_IRQHandler          ;  2:  SLAVE
97                DCD     SPI0_IRQHandler           ;  3:  SPI0
98                DCD     BB_IRQHandler             ;  4:  BB
99                DCD     LLE_IRQHandler            ;  5:  LLE
100                DCD     USB_IRQHandler            ;  6:  USB
101                DCD     ETH_IRQHandler            ;  7:  ETH
102                DCD     TMR1_IRQHandler           ;  8:  TMR1
103                DCD     TMR2_IRQHandler           ;  9:  TMR2
104                DCD     UART0_IRQHandler          ; 10:  UART0
105                DCD     UART1_IRQHandler          ; 11:  UART1
106                DCD     RTC_IRQHandler            ; 12:  RTC
107                DCD     ADC_IRQHandler            ; 13:  ADC
108                DCD     SPI1_IRQHandler           ; 14:  SPI1
109                DCD     LED_IRQHandler            ; 15:  LED
110                DCD     TMR3_IRQHandler           ; 16:  TMR3
111                DCD     UART2_IRQHandler          ; 17:  UART2
112                DCD     UART3_IRQHandler          ; 18:  UART3
113                DCD     WDT_IRQHandler            ; 19:  WDT
114__Vectors_End
115
116__Vectors_Size  EQU     __Vectors_End - __Vectors
117
118                AREA    |.text|, CODE, READONLY
119
120
121; Reset Handler
122
123Reset_Handler   PROC
124                EXPORT  Reset_Handler             [WEAK]
125                IMPORT  SystemInit
126                IMPORT  __main
127				;LDR     R0, =0x1007058
128				;MOV     SP, R0
129				LDR     R0, =SystemInit
130                BLX     R0
131                LDR     R0, =__main
132                BX      R0
133                ENDP
134
135
136; Dummy Exception Handlers (infinite loops which can be modified)
137
138NMI_Handler     PROC
139                EXPORT  NMI_Handler               [WEAK]
140                B       .
141                ENDP
142HardFault_Handler\
143                PROC
144                EXPORT  HardFault_Handler         [WEAK]
145;                B       .
146                ENDP
147SVC_Handler     PROC
148                EXPORT  SVC_Handler               [WEAK]
149                B       .
150                ENDP
151PendSV_Handler  PROC
152                EXPORT  PendSV_Handler            [WEAK]
153                B       .
154                ENDP
155SysTick_Handler PROC
156                EXPORT  SysTick_Handler           [WEAK]
157                B       .
158                ENDP
159
160Default_Handler PROC
161
162                EXPORT     TMR0_IRQHandler           [WEAK];  0:  TMR0
163                EXPORT     GPIO_IRQHandler           [WEAK];  1:  GPIO
164                EXPORT     SLAVE_IRQHandler          [WEAK];  2:  SLAVE
165                EXPORT     SPI0_IRQHandler           [WEAK];  3:  SPI0
166                EXPORT     BB_IRQHandler             [WEAK];  4:  BB
167                EXPORT     LLE_IRQHandler            [WEAK];  5:  LLE
168                EXPORT     USB_IRQHandler            [WEAK];  6:  USB
169                EXPORT     ETH_IRQHandler            [WEAK];  7:  ETH
170                EXPORT     TMR1_IRQHandler           [WEAK];  8:  TMR1
171                EXPORT     TMR2_IRQHandler           [WEAK];  9:  TMR2
172                EXPORT     UART0_IRQHandler          [WEAK]; 10:  UART0
173                EXPORT     UART1_IRQHandler          [WEAK]; 11:  UART1
174                EXPORT     RTC_IRQHandler            [WEAK]; 12:  RTC
175                EXPORT     ADC_IRQHandler            [WEAK]; 13:  ADC
176                EXPORT     SPI1_IRQHandler           [WEAK]; 14:  SPI1
177                EXPORT     LED_IRQHandler            [WEAK]; 15:  LED
178                EXPORT     TMR3_IRQHandler           [WEAK]; 16:  TMR3
179                EXPORT     UART2_IRQHandler          [WEAK]; 17:  UART2
180                EXPORT     UART3_IRQHandler          [WEAK]; 18:  UART3
181                EXPORT     WDT_IRQHandler            [WEAK]; 19:  WDT
182
183TMR0_IRQHandler           ;  0:  TMR0
184GPIO_IRQHandler           ;  1:  GPIO
185SLAVE_IRQHandler          ;  2:  SLAVE
186SPI0_IRQHandler           ;  3:  SPI0
187BB_IRQHandler             ;  4:  BB
188LLE_IRQHandler            ;  5:  LLE
189USB_IRQHandler            ;  6:  USB
190ETH_IRQHandler            ;  7:  ETH
191TMR1_IRQHandler           ;  8:  TMR1
192TMR2_IRQHandler           ;  9:  TMR2
193UART0_IRQHandler          ; 10:  UART0
194UART1_IRQHandler          ; 11:  UART1
195RTC_IRQHandler            ; 12:  RTC
196ADC_IRQHandler            ; 13:  ADC
197SPI1_IRQHandler           ; 14:  SPI1
198LED_IRQHandler            ; 15:  LED
199TMR3_IRQHandler           ; 16:  TMR3
200UART2_IRQHandler          ; 17:  UART2
201UART3_IRQHandler          ; 18:  UART3
202WDT_IRQHandler            ; 19:  WDT
203                B       .
204
205                ENDP
206
207
208                ALIGN
209
210
211; User Initial Stack & Heap
212
213                IF      :DEF:__MICROLIB
214
215                EXPORT  __initial_sp
216                EXPORT  __heap_base
217                EXPORT  __heap_limit
218
219                ELSE
220
221                IMPORT  __use_two_region_memory
222                EXPORT  __user_initial_stackheap
223
224__user_initial_stackheap PROC
225                LDR     R0, =  Heap_Mem
226                LDR     R1, =(Stack_Mem + Stack_Size)
227                LDR     R2, = (Heap_Mem +  Heap_Size)
228                LDR     R3, = Stack_Mem
229                BX      LR
230                ENDP
231
232                ALIGN
233
234                ENDIF
235
236
237                END
238