1 /********************************** (C) COPYRIGHT  *******************************
2  * File Name          : ch32v10x_dma.h
3  * Author             : WCH
4  * Version            : V1.0.0
5  * Date               : 2020/04/30
6  * Description        : This file contains all the functions prototypes for the
7  *                      DMA firmware library.
8  * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
9  * SPDX-License-Identifier: Apache-2.0
10  *******************************************************************************/
11 #ifndef __CH32V10x_DMA_H
12 #define __CH32V10x_DMA_H
13 
14 #ifdef __cplusplus
15 extern "C" {
16 #endif
17 
18 #include "ch32v10x.h"
19 
20 /* DMA Init structure definition */
21 typedef struct
22 {
23     uint32_t DMA_PeripheralBaseAddr; /* Specifies the peripheral base address for DMAy Channelx. */
24 
25     uint32_t DMA_MemoryBaseAddr; /* Specifies the memory base address for DMAy Channelx. */
26 
27     uint32_t DMA_DIR; /* Specifies if the peripheral is the source or destination.
28                          This parameter can be a value of @ref DMA_data_transfer_direction */
29 
30     uint32_t DMA_BufferSize; /* Specifies the buffer size, in data unit, of the specified Channel.
31                                 The data unit is equal to the configuration set in DMA_PeripheralDataSize
32                                 or DMA_MemoryDataSize members depending in the transfer direction. */
33 
34     uint32_t DMA_PeripheralInc; /* Specifies whether the Peripheral address register is incremented or not.
35                                    This parameter can be a value of @ref DMA_peripheral_incremented_mode */
36 
37     uint32_t DMA_MemoryInc; /* Specifies whether the memory address register is incremented or not.
38                                This parameter can be a value of @ref DMA_memory_incremented_mode */
39 
40     uint32_t DMA_PeripheralDataSize; /* Specifies the Peripheral data width.
41                                         This parameter can be a value of @ref DMA_peripheral_data_size */
42 
43     uint32_t DMA_MemoryDataSize; /* Specifies the Memory data width.
44                                     This parameter can be a value of @ref DMA_memory_data_size */
45 
46     uint32_t DMA_Mode; /* Specifies the operation mode of the DMAy Channelx.
47                           This parameter can be a value of @ref DMA_circular_normal_mode.
48                           @note: The circular buffer mode cannot be used if the memory-to-memory
49                                 data transfer is configured on the selected Channel */
50 
51     uint32_t DMA_Priority; /* Specifies the software priority for the DMAy Channelx.
52                               This parameter can be a value of @ref DMA_priority_level */
53 
54     uint32_t DMA_M2M; /* Specifies if the DMAy Channelx will be used in memory-to-memory transfer.
55                          This parameter can be a value of @ref DMA_memory_to_memory */
56 } DMA_InitTypeDef;
57 
58 /* DMA_data_transfer_direction */
59 #define DMA_DIR_PeripheralDST              ((uint32_t)0x00000010)
60 #define DMA_DIR_PeripheralSRC              ((uint32_t)0x00000000)
61 
62 /* DMA_peripheral_incremented_mode */
63 #define DMA_PeripheralInc_Enable           ((uint32_t)0x00000040)
64 #define DMA_PeripheralInc_Disable          ((uint32_t)0x00000000)
65 
66 /* DMA_memory_incremented_mode */
67 #define DMA_MemoryInc_Enable               ((uint32_t)0x00000080)
68 #define DMA_MemoryInc_Disable              ((uint32_t)0x00000000)
69 
70 /* DMA_peripheral_data_size */
71 #define DMA_PeripheralDataSize_Byte        ((uint32_t)0x00000000)
72 #define DMA_PeripheralDataSize_HalfWord    ((uint32_t)0x00000100)
73 #define DMA_PeripheralDataSize_Word        ((uint32_t)0x00000200)
74 
75 /* DMA_memory_data_size */
76 #define DMA_MemoryDataSize_Byte            ((uint32_t)0x00000000)
77 #define DMA_MemoryDataSize_HalfWord        ((uint32_t)0x00000400)
78 #define DMA_MemoryDataSize_Word            ((uint32_t)0x00000800)
79 
80 /* DMA_circular_normal_mode */
81 #define DMA_Mode_Circular                  ((uint32_t)0x00000020)
82 #define DMA_Mode_Normal                    ((uint32_t)0x00000000)
83 
84 /* DMA_priority_level */
85 #define DMA_Priority_VeryHigh              ((uint32_t)0x00003000)
86 #define DMA_Priority_High                  ((uint32_t)0x00002000)
87 #define DMA_Priority_Medium                ((uint32_t)0x00001000)
88 #define DMA_Priority_Low                   ((uint32_t)0x00000000)
89 
90 /* DMA_memory_to_memory */
91 #define DMA_M2M_Enable                     ((uint32_t)0x00004000)
92 #define DMA_M2M_Disable                    ((uint32_t)0x00000000)
93 
94 /* DMA_interrupts_definition */
95 #define DMA_IT_TC                          ((uint32_t)0x00000002)
96 #define DMA_IT_HT                          ((uint32_t)0x00000004)
97 #define DMA_IT_TE                          ((uint32_t)0x00000008)
98 
99 #define DMA1_IT_GL1                        ((uint32_t)0x00000001)
100 #define DMA1_IT_TC1                        ((uint32_t)0x00000002)
101 #define DMA1_IT_HT1                        ((uint32_t)0x00000004)
102 #define DMA1_IT_TE1                        ((uint32_t)0x00000008)
103 #define DMA1_IT_GL2                        ((uint32_t)0x00000010)
104 #define DMA1_IT_TC2                        ((uint32_t)0x00000020)
105 #define DMA1_IT_HT2                        ((uint32_t)0x00000040)
106 #define DMA1_IT_TE2                        ((uint32_t)0x00000080)
107 #define DMA1_IT_GL3                        ((uint32_t)0x00000100)
108 #define DMA1_IT_TC3                        ((uint32_t)0x00000200)
109 #define DMA1_IT_HT3                        ((uint32_t)0x00000400)
110 #define DMA1_IT_TE3                        ((uint32_t)0x00000800)
111 #define DMA1_IT_GL4                        ((uint32_t)0x00001000)
112 #define DMA1_IT_TC4                        ((uint32_t)0x00002000)
113 #define DMA1_IT_HT4                        ((uint32_t)0x00004000)
114 #define DMA1_IT_TE4                        ((uint32_t)0x00008000)
115 #define DMA1_IT_GL5                        ((uint32_t)0x00010000)
116 #define DMA1_IT_TC5                        ((uint32_t)0x00020000)
117 #define DMA1_IT_HT5                        ((uint32_t)0x00040000)
118 #define DMA1_IT_TE5                        ((uint32_t)0x00080000)
119 #define DMA1_IT_GL6                        ((uint32_t)0x00100000)
120 #define DMA1_IT_TC6                        ((uint32_t)0x00200000)
121 #define DMA1_IT_HT6                        ((uint32_t)0x00400000)
122 #define DMA1_IT_TE6                        ((uint32_t)0x00800000)
123 #define DMA1_IT_GL7                        ((uint32_t)0x01000000)
124 #define DMA1_IT_TC7                        ((uint32_t)0x02000000)
125 #define DMA1_IT_HT7                        ((uint32_t)0x04000000)
126 #define DMA1_IT_TE7                        ((uint32_t)0x08000000)
127 
128 #define DMA2_IT_GL1                        ((uint32_t)0x10000001)
129 #define DMA2_IT_TC1                        ((uint32_t)0x10000002)
130 #define DMA2_IT_HT1                        ((uint32_t)0x10000004)
131 #define DMA2_IT_TE1                        ((uint32_t)0x10000008)
132 #define DMA2_IT_GL2                        ((uint32_t)0x10000010)
133 #define DMA2_IT_TC2                        ((uint32_t)0x10000020)
134 #define DMA2_IT_HT2                        ((uint32_t)0x10000040)
135 #define DMA2_IT_TE2                        ((uint32_t)0x10000080)
136 #define DMA2_IT_GL3                        ((uint32_t)0x10000100)
137 #define DMA2_IT_TC3                        ((uint32_t)0x10000200)
138 #define DMA2_IT_HT3                        ((uint32_t)0x10000400)
139 #define DMA2_IT_TE3                        ((uint32_t)0x10000800)
140 #define DMA2_IT_GL4                        ((uint32_t)0x10001000)
141 #define DMA2_IT_TC4                        ((uint32_t)0x10002000)
142 #define DMA2_IT_HT4                        ((uint32_t)0x10004000)
143 #define DMA2_IT_TE4                        ((uint32_t)0x10008000)
144 #define DMA2_IT_GL5                        ((uint32_t)0x10010000)
145 #define DMA2_IT_TC5                        ((uint32_t)0x10020000)
146 #define DMA2_IT_HT5                        ((uint32_t)0x10040000)
147 #define DMA2_IT_TE5                        ((uint32_t)0x10080000)
148 
149 /* DMA_flags_definition */
150 #define DMA1_FLAG_GL1                      ((uint32_t)0x00000001)
151 #define DMA1_FLAG_TC1                      ((uint32_t)0x00000002)
152 #define DMA1_FLAG_HT1                      ((uint32_t)0x00000004)
153 #define DMA1_FLAG_TE1                      ((uint32_t)0x00000008)
154 #define DMA1_FLAG_GL2                      ((uint32_t)0x00000010)
155 #define DMA1_FLAG_TC2                      ((uint32_t)0x00000020)
156 #define DMA1_FLAG_HT2                      ((uint32_t)0x00000040)
157 #define DMA1_FLAG_TE2                      ((uint32_t)0x00000080)
158 #define DMA1_FLAG_GL3                      ((uint32_t)0x00000100)
159 #define DMA1_FLAG_TC3                      ((uint32_t)0x00000200)
160 #define DMA1_FLAG_HT3                      ((uint32_t)0x00000400)
161 #define DMA1_FLAG_TE3                      ((uint32_t)0x00000800)
162 #define DMA1_FLAG_GL4                      ((uint32_t)0x00001000)
163 #define DMA1_FLAG_TC4                      ((uint32_t)0x00002000)
164 #define DMA1_FLAG_HT4                      ((uint32_t)0x00004000)
165 #define DMA1_FLAG_TE4                      ((uint32_t)0x00008000)
166 #define DMA1_FLAG_GL5                      ((uint32_t)0x00010000)
167 #define DMA1_FLAG_TC5                      ((uint32_t)0x00020000)
168 #define DMA1_FLAG_HT5                      ((uint32_t)0x00040000)
169 #define DMA1_FLAG_TE5                      ((uint32_t)0x00080000)
170 #define DMA1_FLAG_GL6                      ((uint32_t)0x00100000)
171 #define DMA1_FLAG_TC6                      ((uint32_t)0x00200000)
172 #define DMA1_FLAG_HT6                      ((uint32_t)0x00400000)
173 #define DMA1_FLAG_TE6                      ((uint32_t)0x00800000)
174 #define DMA1_FLAG_GL7                      ((uint32_t)0x01000000)
175 #define DMA1_FLAG_TC7                      ((uint32_t)0x02000000)
176 #define DMA1_FLAG_HT7                      ((uint32_t)0x04000000)
177 #define DMA1_FLAG_TE7                      ((uint32_t)0x08000000)
178 
179 #define DMA2_FLAG_GL1                      ((uint32_t)0x10000001)
180 #define DMA2_FLAG_TC1                      ((uint32_t)0x10000002)
181 #define DMA2_FLAG_HT1                      ((uint32_t)0x10000004)
182 #define DMA2_FLAG_TE1                      ((uint32_t)0x10000008)
183 #define DMA2_FLAG_GL2                      ((uint32_t)0x10000010)
184 #define DMA2_FLAG_TC2                      ((uint32_t)0x10000020)
185 #define DMA2_FLAG_HT2                      ((uint32_t)0x10000040)
186 #define DMA2_FLAG_TE2                      ((uint32_t)0x10000080)
187 #define DMA2_FLAG_GL3                      ((uint32_t)0x10000100)
188 #define DMA2_FLAG_TC3                      ((uint32_t)0x10000200)
189 #define DMA2_FLAG_HT3                      ((uint32_t)0x10000400)
190 #define DMA2_FLAG_TE3                      ((uint32_t)0x10000800)
191 #define DMA2_FLAG_GL4                      ((uint32_t)0x10001000)
192 #define DMA2_FLAG_TC4                      ((uint32_t)0x10002000)
193 #define DMA2_FLAG_HT4                      ((uint32_t)0x10004000)
194 #define DMA2_FLAG_TE4                      ((uint32_t)0x10008000)
195 #define DMA2_FLAG_GL5                      ((uint32_t)0x10010000)
196 #define DMA2_FLAG_TC5                      ((uint32_t)0x10020000)
197 #define DMA2_FLAG_HT5                      ((uint32_t)0x10040000)
198 #define DMA2_FLAG_TE5                      ((uint32_t)0x10080000)
199 
200 void       DMA_DeInit(DMA_Channel_TypeDef *DMAy_Channelx);
201 void       DMA_Init(DMA_Channel_TypeDef *DMAy_Channelx, DMA_InitTypeDef *DMA_InitStruct);
202 void       DMA_StructInit(DMA_InitTypeDef *DMA_InitStruct);
203 void       DMA_Cmd(DMA_Channel_TypeDef *DMAy_Channelx, FunctionalState NewState);
204 void       DMA_ITConfig(DMA_Channel_TypeDef *DMAy_Channelx, uint32_t DMA_IT, FunctionalState NewState);
205 void       DMA_SetCurrDataCounter(DMA_Channel_TypeDef *DMAy_Channelx, uint16_t DataNumber);
206 uint16_t   DMA_GetCurrDataCounter(DMA_Channel_TypeDef *DMAy_Channelx);
207 FlagStatus DMA_GetFlagStatus(uint32_t DMAy_FLAG);
208 void       DMA_ClearFlag(uint32_t DMAy_FLAG);
209 ITStatus   DMA_GetITStatus(uint32_t DMAy_IT);
210 void       DMA_ClearITPendingBit(uint32_t DMAy_IT);
211 
212 #ifdef __cplusplus
213 }
214 #endif
215 
216 #endif /*__CH32V10x_DMA_H */
217