1 /* 2 * Copyright (c) 2006-2023, RT-Thread Development Team 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 * 6 * Change Logs: 7 * Date Author Notes 8 * 2022-09-10 MXH the first version 9 */ 10 11 #ifndef __DRV_HWTIMER_H__ 12 #define __DRV_HWTIMER_H__ 13 14 #include <rtthread.h> 15 #if defined(SOC_RISCV_SERIES_CH32V3) 16 #include "ch32v30x_tim.h" 17 #endif 18 #if defined(SOC_RISCV_SERIES_CH32V2) 19 #include "ch32v20x_tim.h" 20 #endif 21 22 #ifdef BSP_USING_HWTIMER 23 24 typedef struct 25 { 26 TIM_TypeDef *instance; 27 TIM_TimeBaseInitTypeDef init; 28 rt_uint32_t rcc; 29 30 }TIM_HandleTypeDef; 31 32 struct ch32_hwtimer 33 { 34 rt_hwtimer_t device; 35 TIM_HandleTypeDef handle; 36 IRQn_Type irqn; 37 char *name; 38 }; 39 40 /* TIM CONFIG */ 41 #ifndef TIM_DEV_INFO_CONFIG 42 #define TIM_DEV_INFO_CONFIG \ 43 { \ 44 .maxfreq = 1000000, \ 45 .minfreq = 3000, \ 46 .maxcnt = 0xFFFF, \ 47 .cntmode = HWTIMER_CNTMODE_UP, \ 48 } 49 #endif /* TIM_DEV_INFO_CONFIG */ 50 51 #ifdef BSP_USING_TIM1 52 #define TIM1_CONFIG \ 53 { \ 54 .handle.instance = TIM1, \ 55 .handle.rcc = RCC_APB2Periph_TIM1, \ 56 .irqn = TIM1_UP_IRQn, \ 57 .name = "timer1", \ 58 } 59 #endif /* BSP_USING_TIM1 */ 60 61 #ifdef BSP_USING_TIM2 62 #define TIM2_CONFIG \ 63 { \ 64 .handle.instance = TIM2, \ 65 .handle.rcc = RCC_APB1Periph_TIM2, \ 66 .irqn = TIM2_IRQn, \ 67 .name = "timer2", \ 68 } 69 #endif /* BSP_USING_TIM2 */ 70 71 #ifdef BSP_USING_TIM3 72 #define TIM3_CONFIG \ 73 { \ 74 .handle.instance = TIM3, \ 75 .handle.rcc = RCC_APB1Periph_TIM3, \ 76 .irqn = TIM3_IRQn, \ 77 .name = "timer3", \ 78 } 79 #endif /* BSP_USING_TIM3 */ 80 81 #ifdef BSP_USING_TIM4 82 #define TIM4_CONFIG \ 83 { \ 84 .handle.instance = TIM4, \ 85 .handle.rcc = RCC_APB1Periph_TIM4, \ 86 .irqn = TIM4_IRQn, \ 87 .name = "timer4", \ 88 } 89 #endif /* BSP_USING_TIM4 */ 90 91 #ifdef BSP_USING_TIM5 92 #define TIM5_CONFIG \ 93 { \ 94 .handle.instance = TIM5, \ 95 .handle.rcc = RCC_APB1Periph_TIM5, \ 96 .irqn = TIM5_IRQn, \ 97 .name = "timer5", \ 98 } 99 #endif /* BSP_USING_TIM5 */ 100 101 #ifdef BSP_USING_TIM6 102 #define TIM6_CONFIG \ 103 { \ 104 .handle.instance = TIM6, \ 105 .handle.rcc = RCC_APB1Periph_TIM6, \ 106 .irqn = TIM6_IRQn, \ 107 .name = "timer6", \ 108 } 109 #endif /* BSP_USING_TIM6 */ 110 111 #ifdef BSP_USING_TIM7 112 #define TIM7_CONFIG \ 113 { \ 114 .handle.instance = TIM7, \ 115 .handle.rcc = RCC_APB1Periph_TIM7, \ 116 .irqn = TIM7_IRQn, \ 117 .name = "timer7", \ 118 } 119 #endif /* BSP_USING_TIM7 */ 120 121 #ifdef BSP_USING_TIM8 122 #define TIM8_CONFIG \ 123 { \ 124 .handle.instance = TIM8, \ 125 .handle.rcc = RCC_APB2Periph_TIM8, \ 126 .irqn = TIM8_UP_IRQn, \ 127 .name = "timer8", \ 128 } 129 #endif /* BSP_USING_TIM8 */ 130 131 #ifdef BSP_USING_TIM9 132 #define TIM9_CONFIG \ 133 { \ 134 .handle.instance = TIM9, \ 135 .handle.rcc = RCC_APB2Periph_TIM9, \ 136 .irqn = TIM9_UP_IRQn, \ 137 .name = "timer9", \ 138 } 139 #endif /* BSP_USING_TIM9 */ 140 141 #ifdef BSP_USING_TIM10 142 #define TIM10_CONFIG \ 143 { \ 144 .handle.instance = TIM10, \ 145 .handle.rcc = RCC_APB2Periph_TIM10, \ 146 .irqn = TIM10_UP_IRQn, \ 147 .name = "timer10", \ 148 } 149 #endif /* BSP_USING_TIM10 */ 150 151 #endif /* BSP_USING_HWTIMER */ 152 #endif /* __DRV_HWTIMER_H__ */ 153