1;/*********************************************************************** 2; * $Id: startup_LPC43xx.s 6473 2011-02-16 17:40:54Z nxp27266 $ 3; * 4; * Project: LPC43xx CMSIS Package 5; * 6; * Description: Cortex-M3 Core Device Startup File for the NXP LPC43xx 7; * Device Series. 8; * 9; * Copyright(C) 2011, NXP Semiconductor 10; * All rights reserved. 11; * 12; * modified by KEIL 13; *********************************************************************** 14; * Software that is described herein is for illustrative purposes only 15; * which provides customers with programming information regarding the 16; * products. This software is supplied "AS IS" without any warranties. 17; * NXP Semiconductors assumes no responsibility or liability for the 18; * use of the software, conveys no license or title under any patent, 19; * copyright, or mask work right to the product. NXP Semiconductors 20; * reserves the right to make changes in the software without 21; * notification. NXP Semiconductors also make no representation or 22; * warranty that such application will be suitable for the specified 23; * use without further testing or modification. 24; **********************************************************************/ 25 26; <h> Stack Configuration 27; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> 28; </h> 29 30Stack_Size EQU 0x00000400 31 32 AREA STACK, NOINIT, READWRITE, ALIGN=3 33Stack_Mem SPACE Stack_Size 34__initial_sp 35 36 37; <h> Heap Configuration 38; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> 39; </h> 40 41Heap_Size EQU 0x00000200 42 43 AREA HEAP, NOINIT, READWRITE, ALIGN=3 44__heap_base 45Heap_Mem SPACE Heap_Size 46__heap_limit 47 48 PRESERVE8 49 THUMB 50 51; Vector Table Mapped to Address 0 at Reset 52 53 AREA RESET, DATA, READONLY 54 EXPORT __Vectors 55 56Sign_Value EQU 0x5A5A5A5A 57 58__Vectors DCD __initial_sp ; 0 Top of Stack 59 DCD Reset_Handler ; 1 Reset Handler 60 DCD NMI_Handler ; 2 NMI Handler 61 DCD HardFault_Handler ; 3 Hard Fault Handler 62 DCD MemManage_Handler ; 4 MPU Fault Handler 63 DCD BusFault_Handler ; 5 Bus Fault Handler 64 DCD UsageFault_Handler ; 6 Usage Fault Handler 65 DCD Sign_Value ; 7 Reserved 66 DCD 0 ; 8 Reserved 67 DCD 0 ; 9 Reserved 68 DCD 0 ; 10 Reserved 69 DCD SVC_Handler ; 11 SVCall Handler 70 DCD DebugMon_Handler ; 12 Debug Monitor Handler 71 DCD 0 ; 13 Reserved 72 DCD PendSV_Handler ; 14 PendSV Handler 73 DCD SysTick_Handler ; 15 SysTick Handler 74 75 ; External Interrupts 76 DCD DAC_IRQHandler ; 16 D/A Converter 77 DCD M0CORE_IRQHandler ; 17 M0 Core 78 DCD DMA_IRQHandler ; 18 General Purpose DMA 79 DCD EZH_IRQHandler ; 19 EZH/EDM 80 DCD FLASH_EEPROM_IRQHandler ; 20 Reserved for Typhoon 81 DCD ETH_IRQHandler ; 21 Ethernet 82 DCD SDIO_IRQHandler ; 22 SD/MMC 83 DCD LCD_IRQHandler ; 23 LCD 84 DCD USB0_IRQHandler ; 24 USB0 85 DCD USB1_IRQHandler ; 25 USB1 86 DCD SCT_IRQHandler ; 26 State Configurable Timer 87 DCD RIT_IRQHandler ; 27 Repetitive Interrupt Timer 88 DCD TIMER0_IRQHandler ; 28 Timer0 89 DCD TIMER1_IRQHandler ; 29 Timer1 90 DCD TIMER2_IRQHandler ; 30 Timer2 91 DCD TIMER3_IRQHandler ; 31 Timer3 92 DCD MCPWM_IRQHandler ; 32 Motor Control PWM 93 DCD ADC0_IRQHandler ; 33 A/D Converter 0 94 DCD I2C0_IRQHandler ; 34 I2C0 95 DCD I2C1_IRQHandler ; 35 I2C1 96 DCD SPI_IRQHandler ; 36 SPI 97 DCD ADC1_IRQHandler ; 37 A/D Converter 1 98 DCD SSP0_IRQHandler ; 38 SSP0 99 DCD SSP1_IRQHandler ; 39 SSP1 100 DCD UART0_IRQHandler ; 40 UART0 101 DCD UART1_IRQHandler ; 41 UART1 102 DCD UART2_IRQHandler ; 42 UART2 103 DCD UART3_IRQHandler ; 43 UART3 104 DCD I2S0_IRQHandler ; 44 I2S0 105 DCD I2S1_IRQHandler ; 45 I2S1 106 DCD SPIFI_IRQHandler ; 46 SPI Flash Interface 107 DCD SGPIO_IRQHandler ; 47 SGPIO 108 DCD GPIO0_IRQHandler ; 48 GPIO0 109 DCD GPIO1_IRQHandler ; 49 GPIO1 110 DCD GPIO2_IRQHandler ; 50 GPIO2 111 DCD GPIO3_IRQHandler ; 51 GPIO3 112 DCD GPIO4_IRQHandler ; 52 GPIO4 113 DCD GPIO5_IRQHandler ; 53 GPIO5 114 DCD GPIO6_IRQHandler ; 54 GPIO6 115 DCD GPIO7_IRQHandler ; 55 GPIO7 116 DCD GINT0_IRQHandler ; 56 GINT0 117 DCD GINT1_IRQHandler ; 57 GINT1 118 DCD EVRT_IRQHandler ; 58 Event Router 119 DCD CAN1_IRQHandler ; 59 C_CAN1 120 DCD 0 ; 60 Reserved 121 DCD VADC_IRQHandler ; 61 VADC 122 DCD ATIMER_IRQHandler ; 62 ATIMER 123 DCD RTC_IRQHandler ; 63 RTC 124 DCD 0 ; 64 Reserved 125 DCD WDT_IRQHandler ; 65 WDT 126 DCD M0s_IRQHandler ; 66 M0s 127 DCD CAN0_IRQHandler ; 67 C_CAN0 128 DCD QEI_IRQHandler ; 68 QEI 129 130 131 132 AREA |.text|, CODE, READONLY 133 134; Reset Handler 135 136Reset_Handler PROC 137 EXPORT Reset_Handler [WEAK] 138 IMPORT SystemInit 139 IMPORT __main 140 LDR R0, =SystemInit 141 BLX R0 142 LDR R0, =__main 143 BX R0 144 ENDP 145 146; Dummy Exception Handlers (infinite loops which can be modified) 147 148NMI_Handler PROC 149 EXPORT NMI_Handler [WEAK] 150 B . 151 ENDP 152HardFault_Handler\ 153 PROC 154 EXPORT HardFault_Handler [WEAK] 155 B . 156 ENDP 157MemManage_Handler\ 158 PROC 159 EXPORT MemManage_Handler [WEAK] 160 B . 161 ENDP 162BusFault_Handler\ 163 PROC 164 EXPORT BusFault_Handler [WEAK] 165 B . 166 ENDP 167UsageFault_Handler\ 168 PROC 169 EXPORT UsageFault_Handler [WEAK] 170 B . 171 ENDP 172SVC_Handler PROC 173 EXPORT SVC_Handler [WEAK] 174 B . 175 ENDP 176DebugMon_Handler\ 177 PROC 178 EXPORT DebugMon_Handler [WEAK] 179 B . 180 ENDP 181PendSV_Handler PROC 182 EXPORT PendSV_Handler [WEAK] 183 B . 184 ENDP 185SysTick_Handler PROC 186 EXPORT SysTick_Handler [WEAK] 187 B . 188 ENDP 189 190Default_Handler PROC 191 192 EXPORT DAC_IRQHandler [WEAK] 193 EXPORT M0CORE_IRQHandler [WEAK] 194 EXPORT DMA_IRQHandler [WEAK] 195 EXPORT EZH_IRQHandler [WEAK] 196 EXPORT FLASH_EEPROM_IRQHandler [WEAK] 197 EXPORT ETH_IRQHandler [WEAK] 198 EXPORT SDIO_IRQHandler [WEAK] 199 EXPORT LCD_IRQHandler [WEAK] 200 EXPORT USB0_IRQHandler [WEAK] 201 EXPORT USB1_IRQHandler [WEAK] 202 EXPORT SCT_IRQHandler [WEAK] 203 EXPORT RIT_IRQHandler [WEAK] 204 EXPORT TIMER0_IRQHandler [WEAK] 205 EXPORT TIMER1_IRQHandler [WEAK] 206 EXPORT TIMER2_IRQHandler [WEAK] 207 EXPORT TIMER3_IRQHandler [WEAK] 208 EXPORT MCPWM_IRQHandler [WEAK] 209 EXPORT ADC0_IRQHandler [WEAK] 210 EXPORT I2C0_IRQHandler [WEAK] 211 EXPORT I2C1_IRQHandler [WEAK] 212 EXPORT SPI_IRQHandler [WEAK] 213 EXPORT ADC1_IRQHandler [WEAK] 214 EXPORT SSP0_IRQHandler [WEAK] 215 EXPORT SSP1_IRQHandler [WEAK] 216 EXPORT UART0_IRQHandler [WEAK] 217 EXPORT UART1_IRQHandler [WEAK] 218 EXPORT UART2_IRQHandler [WEAK] 219 EXPORT UART3_IRQHandler [WEAK] 220 EXPORT I2S0_IRQHandler [WEAK] 221 EXPORT I2S1_IRQHandler [WEAK] 222 EXPORT SPIFI_IRQHandler [WEAK] 223 EXPORT SGPIO_IRQHandler [WEAK] 224 EXPORT GPIO0_IRQHandler [WEAK] 225 EXPORT GPIO1_IRQHandler [WEAK] 226 EXPORT GPIO2_IRQHandler [WEAK] 227 EXPORT GPIO3_IRQHandler [WEAK] 228 EXPORT GPIO4_IRQHandler [WEAK] 229 EXPORT GPIO5_IRQHandler [WEAK] 230 EXPORT GPIO6_IRQHandler [WEAK] 231 EXPORT GPIO7_IRQHandler [WEAK] 232 EXPORT GINT0_IRQHandler [WEAK] 233 EXPORT GINT1_IRQHandler [WEAK] 234 EXPORT EVRT_IRQHandler [WEAK] 235 EXPORT CAN1_IRQHandler [WEAK] 236 EXPORT VADC_IRQHandler [WEAK] 237 EXPORT ATIMER_IRQHandler [WEAK] 238 EXPORT RTC_IRQHandler [WEAK] 239 EXPORT WDT_IRQHandler [WEAK] 240 EXPORT M0s_IRQHandler [WEAK] 241 EXPORT CAN0_IRQHandler [WEAK] 242 EXPORT QEI_IRQHandler [WEAK] 243 244DAC_IRQHandler 245M0CORE_IRQHandler 246DMA_IRQHandler 247EZH_IRQHandler 248FLASH_EEPROM_IRQHandler 249ETH_IRQHandler 250SDIO_IRQHandler 251LCD_IRQHandler 252USB0_IRQHandler 253USB1_IRQHandler 254SCT_IRQHandler 255RIT_IRQHandler 256TIMER0_IRQHandler 257TIMER1_IRQHandler 258TIMER2_IRQHandler 259TIMER3_IRQHandler 260MCPWM_IRQHandler 261ADC0_IRQHandler 262I2C0_IRQHandler 263I2C1_IRQHandler 264SPI_IRQHandler 265ADC1_IRQHandler 266SSP0_IRQHandler 267SSP1_IRQHandler 268UART0_IRQHandler 269UART1_IRQHandler 270UART2_IRQHandler 271UART3_IRQHandler 272I2S0_IRQHandler 273I2S1_IRQHandler 274SPIFI_IRQHandler 275SGPIO_IRQHandler 276GPIO0_IRQHandler 277GPIO1_IRQHandler 278GPIO2_IRQHandler 279GPIO3_IRQHandler 280GPIO4_IRQHandler 281GPIO5_IRQHandler 282GPIO6_IRQHandler 283GPIO7_IRQHandler 284GINT0_IRQHandler 285GINT1_IRQHandler 286EVRT_IRQHandler 287CAN1_IRQHandler 288VADC_IRQHandler 289ATIMER_IRQHandler 290RTC_IRQHandler 291WDT_IRQHandler 292M0s_IRQHandler 293CAN0_IRQHandler 294QEI_IRQHandler 295 296 B . 297 298 ENDP 299 300 ALIGN 301 302; User Initial Stack & Heap 303 304 IF :DEF:__MICROLIB 305 306 EXPORT __initial_sp 307 EXPORT __heap_base 308 EXPORT __heap_limit 309 310 ELSE 311 312 IMPORT __use_two_region_memory 313 EXPORT __user_initial_stackheap 314__user_initial_stackheap 315 316 LDR R0, = Heap_Mem 317 LDR R1, =(Stack_Mem + Stack_Size) 318 LDR R2, = (Heap_Mem + Heap_Size) 319 LDR R3, = Stack_Mem 320 BX LR 321 322 ALIGN 323 324 ENDIF 325 326 327 END 328