1 /*
2  * Copyright (c) 2006-2020, YICHIP Development Team
3  * @file     yc_rom_api.h
4  * @brief    source file for setting rom_api
5  *
6  * Change Logs:
7  * Date           Author      Version        Notes
8  * 2020-11-05     wushengyan         V1.0.0         the first version
9  */
10 #ifndef __ROM_API_H__
11 #define __ROM_API_H__
12 
13 #define YC3122_AA   (0)
14 #define YC3122_AB   (1)
15 #define IC_DEVICE   YC3122_AB
16 #if (IC_DEVICE == YC3122_AA)
17 /* TIMER */
18 #define FUNC_DELAY_US_ADDR                  (0x5030 + 1)
19 #define FUNC_DELAY_MS_ADDR                  (0x5068 + 1)
20 
21 /* OTP */
22 #define FUNC_INIT_OTP_ADDR                  (0x5468 + 1)
23 #define FUNC_DEINIT_OTP_ADDR                (0x54c8 + 1)
24 #define FUNC_READ_OTP_ADDR                  (0x5510 + 1)
25 #define FUNC_WRITE_OTP_ADDR                 (0x5648 + 1)
26 #define FUNC_READ_CHIPID_ADDR               (0x56ac + 1)
27 #define FUNC_READ_CHIPLF_ADDR               (0x56ba + 1)
28 
29 /* LPM */
30 #define FUNC_LIGHT_SLEEP_ADDR               (0x5338 + 1)
31 #define FUNC_DEEP_SLEEP_ADDR                (0x535c + 1)
32 
33 /* QSPI */
34 #define FUNC_ENC_WRITE_FLASH_ADDR           (0x67c0 + 1)
35 #define FUNC_QSPI_FLASH_SECTORERASE_ADDR    (0x59a8 + 1)
36 #define FUNC_QSPI_FLASH_BLOCKERASE_ADDR     (0x59b4 + 1)
37 #define FUNC_QSPI_FLASH_BLOCK64ERASE_ADDR   (0x59c0 + 1)
38 #define FUNC_QSPI_FLASH_WRITE_ADDR          (0x58e8 + 1)
39 #define FUNC_QSPI_FLASH_READ_ADDR           (0x59ea + 1)
40 #define FUNC_FLASH_BLANK_CHECK              (0x670c + 1)
41 #define FUNC_PREFETCH                       (0x5398 + 1)
42 #define FUNC_READ_FLASH_ID                  (0x5a54 + 1)
43 
44 #elif (IC_DEVICE == YC3122_AB)
45 
46 /* TIMER */
47 #define FUNC_DELAY_US_ADDR                  (0x5020 + 1)
48 #define FUNC_DELAY_MS_ADDR                  (0x5058 + 1)
49 
50 /* OTP */
51 #define FUNC_INIT_OTP_ADDR                  (0x5458 + 1)
52 #define FUNC_DEINIT_OTP_ADDR                (0x54b8 + 1)
53 #define FUNC_READ_OTP_ADDR                  (0x5500 + 1)
54 #define FUNC_WRITE_OTP_ADDR                 (0x5638 + 1)
55 #define FUNC_READ_CHIPID_ADDR               (0x569c + 1)
56 #define FUNC_READ_CHIPLF_ADDR               (0x56aa + 1)
57 
58 /* LPM */
59 #define FUNC_LIGHT_SLEEP_ADDR               (0x5328 + 1)
60 #define FUNC_DEEP_SLEEP_ADDR                (0x534c + 1)
61 
62 /* QSPI */
63 #define FUNC_ENC_WRITE_FLASH_ADDR           (0x6798 + 1)
64 #define FUNC_QSPI_FLASH_SECTORERASE_ADDR    (0x5998 + 1)
65 #define FUNC_QSPI_FLASH_BLOCKERASE_ADDR     (0x59a4 + 1)
66 #define FUNC_QSPI_FLASH_BLOCK64ERASE_ADDR   (0x59b0 + 1)
67 #define FUNC_QSPI_FLASH_WRITE_ADDR          (0x58d8 + 1)
68 #define FUNC_QSPI_FLASH_READ_ADDR           (0x59da + 1)
69 #define FUNC_FLASH_BLANK_CHECK              (0x66e4 + 1)
70 #define FUNC_PREFETCH                       (0x5388 + 1)
71 #define FUNC_READ_FLASH_ID                  (0x5a44 + 1)
72 #define FUNC_QSPI_FLASH_CMD                 (0x57ec + 1)
73 
74 #endif
75 
76 
77 #endif
78