1 /*
2 * Copyright (c) 2006-2024 RT-Thread Development Team
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Change Logs:
7 * Date Author Notes
8 * 2024-08-16 zhujiale first version
9 */
10 #ifndef __RT_SDHCI_MMC_H__
11 #define __RT_SDHCI_MMC_H__
12
13 #include <drivers/dev_mmcsd_core.h>
14 #include <rtthread.h>
15 #include <drivers/mmcsd_cmd.h>
16 #include <drivers/dev_mmcsd_core.h>
17 #include <drivers/mmcsd_host.h>
18 #define mmc_dev(x) ((x)->parent)
19
20 #define MMC_SEND_TUNING_BLOCK_HS200 SEND_TUNING_BLOCK_HS200
21 #define MMC_SEND_TUNING_BLOCK SEND_TUNING_BLOCK
22 #define MMC_STOP_TRANSMISSION STOP_TRANSMISSION
23 #define MMC_BUS_TEST_R 14 /* adtc R1 */
24 #define MMC_WRITE_MULTIPLE_BLOCK WRITE_MULTIPLE_BLOCK
25 #define MMC_READ_MULTIPLE_BLOCK READ_MULTIPLE_BLOCK
26
27 #define MMC_TIMING_UHS_DDR50 MMCSD_TIMING_UHS_DDR50
28 #define MMC_TIMING_UHS_SDR50 MMCSD_TIMING_UHS_SDR50
29 #define MMC_TIMING_MMC_HS200 MMCSD_TIMING_MMC_HS200
30 #define MMC_TIMING_MMC_HS400 MMCSD_TIMING_MMC_HS400
31 #define MMC_TIMING_UHS_SDR104 MMCSD_TIMING_UHS_SDR104
32 #define MMC_TIMING_UHS_SDR25 MMCSD_TIMING_UHS_SDR25
33 #define MMC_TIMING_MMC_DDR52 MMCSD_TIMING_MMC_DDR52
34 #define MMC_TIMING_UHS_SDR12 MMCSD_TIMING_UHS_SDR12
35 #define MMC_TIMING_SD_HS MMCSD_TIMING_SD_HS
36 #define MMC_TIMING_MMC_HS MMCSD_TIMING_MMC_HS
37
38 #define MMC_POWER_OFF MMCSD_POWER_OFF
39 #define MMC_POWER_UP MMCSD_POWER_UP
40 #define MMC_POWER_ON MMCSD_POWER_ON
41 #define MMC_POWER_UNDEFINED 3
42
43 #define MMC_SET_DRIVER_TYPE_B 0
44 #define MMC_SET_DRIVER_TYPE_A 1
45 #define MMC_SET_DRIVER_TYPE_C 2
46 #define MMC_SET_DRIVER_TYPE_D 3
47
48 #define MMC_SIGNAL_VOLTAGE_330 0
49 #define MMC_SIGNAL_VOLTAGE_180 1
50 #define MMC_SIGNAL_VOLTAGE_120 2
51
52 #define MMC_RSP_PRESENT (1 << 16)
53 #define MMC_RSP_136 (1 << 17) /* 136 bit response */
54 #define MMC_RSP_CRC (1 << 18) /* expect valid crc */
55 #define MMC_RSP_BUSY (1 << 19) /* card may send busy */
56 #define MMC_RSP_OPCODE (1 << 20) /* response contains opcode */
57
58 #define MMC_RSP_NONE (0)
59 #define MMC_RSP_R1 (MMC_RSP_PRESENT | MMC_RSP_CRC | MMC_RSP_OPCODE)
60 #define MMC_RSP_R1B (MMC_RSP_PRESENT | MMC_RSP_CRC | MMC_RSP_OPCODE | MMC_RSP_BUSY)
61 #define MMC_RSP_R2 (MMC_RSP_PRESENT | MMC_RSP_136 | MMC_RSP_CRC)
62 #define MMC_RSP_R3 (MMC_RSP_PRESENT)
63 #define MMC_RSP_R4 (MMC_RSP_PRESENT)
64 #define MMC_RSP_R5 (MMC_RSP_PRESENT | MMC_RSP_CRC | MMC_RSP_OPCODE)
65 #define MMC_RSP_R6 (MMC_RSP_PRESENT | MMC_RSP_CRC | MMC_RSP_OPCODE)
66 #define MMC_RSP_R7 (MMC_RSP_PRESENT | MMC_RSP_CRC | MMC_RSP_OPCODE)
67
68 #define MMC_CMD_ADTC CMD_ADTC
69
70 #define MMC_BUS_WIDTH_8 MMCSD_BUS_WIDTH_8
71 #define MMC_BUS_WIDTH_4 MMCSD_BUS_WIDTH_4
72 #define MMC_BUS_WIDTH_1 MMCSD_BUS_WIDTH_1
73
74 #define MMC_PM_KEEP_POWER (1 << 0) /* preserve card power during suspend */
75 #define MMC_PM_WAKE_SDIO_IRQ (1 << 1) /* wake up host system on SDIO IRQ assertion */
76 enum mmc_blk_status
77 {
78 MMC_BLK_SUCCESS = 0,
79 MMC_BLK_PARTIAL,
80 MMC_BLK_CMD_ERR,
81 MMC_BLK_RETRY,
82 MMC_BLK_ABORT,
83 MMC_BLK_DATA_ERR,
84 MMC_BLK_ECC_ERR,
85 MMC_BLK_NOMEDIUM,
86 MMC_BLK_NEW_REQUEST,
87 };
88
89 #define MMC_NUM_CLK_PHASES (MMC_TIMING_MMC_HS400 + 1)
90
91 struct rt_mmc_host ;
92
93 struct mmc_host_ops
94 {
95 void (*request)(struct rt_mmc_host *host, struct rt_mmcsd_req *req);
96 void (*set_ios)(struct rt_mmc_host *host, struct rt_mmcsd_io_cfg *ios);
97 int (*get_ro)(struct rt_mmc_host *host);
98 int (*get_cd)(struct rt_mmc_host *host);
99 void (*enable_sdio_irq)(struct rt_mmc_host *host, int enable);
100 void (*ack_sdio_irq)(struct rt_mmc_host *host);
101 int (*start_signal_voltage_switch)(struct rt_mmc_host *host, struct rt_mmcsd_io_cfg *ios);
102 int (*card_busy)(struct rt_mmc_host *host);
103 int (*execute_tuning)(struct rt_mmc_host *host, unsigned opcode);
104 int (*prepare_hs400_tuning)(struct rt_mmc_host *host, struct rt_mmcsd_io_cfg *ios);
105 int (*hs400_prepare_ddr)(struct rt_mmc_host *host);
106 void (*hs400_downgrade)(struct rt_mmc_host *host);
107 void (*hs400_complete)(struct rt_mmc_host *host);
108 void (*hs400_enhanced_strobe)(struct rt_mmc_host *host,
109 struct rt_mmcsd_io_cfg* ios);
110 void (*hw_reset)(struct rt_mmc_host* host);
111 void (*card_event)(struct rt_mmc_host* host);
112 };
113
114 struct regulator;
115 struct mmc_pwrseq;
116
117 struct mmc_supply
118 {
119 struct regulator *vmmc; /* Card power supply */
120 struct regulator *vqmmc; /* Optional Vccq supply */
121 };
122
123 struct mmc_ctx
124 {
125 struct task_struct *task;
126 };
127
128 /* VDD voltage 3.3 ~ 3.4 */
129 #define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */
130 #define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */
131
132 #define MMC_CAP2_HS200_1_8V_SDR MMCSD_SUP_HS200_1V8
133 #define MMC_CAP_4_BIT_DATA MMCSD_BUSWIDTH_4
134 #define MMC_CAP_8_BIT_DATA MMCSD_BUSWIDTH_8
135 #define MMC_CAP2_HS200 MMCSD_SUP_HS200
136 #define MMC_CAP_MMC_HIGHSPEED MMCSD_SUP_HIGHSPEED
137 #define MMC_CAP_SD_HIGHSPEED MMCSD_SUP_HIGHSPEED
138 #define MMC_CAP_1_8V_DDR MMCSD_SUP_DDR_1V8
139 #define MMC_CAP_3_3V_DDR MMCSD_SUP_DDR_3V3
140 #define MMC_CAP_1_2V_DDR MMCSD_SUP_DDR_1V2
141 #define MMC_CAP_NONREMOVABLE MMCSD_SUP_NONREMOVABLE
142
143
144 #define MMC_CAP_UHS_DDR50 0
145 #define MMC_CAP2_HS400 0
146 #define MMC_CAP_UHS_SDR50 0
147 #define MMC_CAP_UHS_SDR25 0
148 #define MMC_CAP_UHS_SDR12 0
149 #define MMC_CAP_UHS_SDR104 0
150 #define MMC_CAP_UHS 0
151 #define MMC_CAP2_HSX00_1_8V 0
152 #define MMC_CAP2_HS400_ES 0
153 #define MMC_CAP_NEEDS_POLL 0
154 #define MMC_CAP2_HSX00_1_2V 0
155 #define MMC_CAP2_HS400_1_8V 0
156 #define MMC_CAP_DRIVER_TYPE_D 0
157 #define MMC_CAP_DRIVER_TYPE_C 0
158 #define MMC_SET_DRIVER_TYPE_B 0
159 #define MMC_CAP_DRIVER_TYPE_A 0
160 #define MMC_CAP2_SDIO_IRQ_NOTHREAD 0
161 #define MMC_CAP_CMD23 0
162 #define MMC_CAP_SDIO_IRQ 0
163
164 #define MMC_CAP2_NO_SDIO (1 << 19)
165 #define MMC_CAP2_NO_SD (1 << 21)
166 #define MMC_CAP2_NO_MMC (1 << 22)
167 #define MMC_CAP2_CQE (1 << 23)
168
169 #define MMC_VDD_165_195 VDD_165_195
170 #define MMC_VDD_20_21 VDD_20_21
171 #define MMC_VDD_29_30 VDD_29_30
172 #define MMC_VDD_30_31 VDD_30_31
173 #define MMC_VDD_32_33 VDD_32_33
174 #define MMC_VDD_33_34 VDD_33_34
175
176
177 struct rt_mmc_host
178 {
179 struct rt_mmcsd_host rthost;
180 struct rt_device *parent;
181 int index;
182 const struct mmc_host_ops *ops;
183 unsigned int f_min;
184 unsigned int f_max;
185 unsigned int f_init;
186 rt_uint32_t ocr_avail;
187 rt_uint32_t ocr_avail_sdio; /* SDIO-specific OCR */
188 rt_uint32_t ocr_avail_sd; /* SD-specific OCR */
189 rt_uint32_t ocr_avail_mmc; /* MMC-specific OCR */
190 struct wakeup_source *ws; /* Enable consume of uevents */
191 rt_uint32_t max_current_330;
192 rt_uint32_t max_current_300;
193 rt_uint32_t max_current_180;
194 rt_uint32_t caps; /* Host capabilities */
195
196 rt_uint32_t caps2; /* More host capabilities */
197
198
199 /* host specific block data */
200 unsigned int max_seg_size; /* see blk_queue_max_segment_size */
201 unsigned short max_segs; /* see blk_queue_max_segments */
202 unsigned short unused;
203 unsigned int max_req_size; /* maximum number of bytes in one req */
204 unsigned int max_blk_size; /* maximum size of one mmc block */
205 unsigned int max_blk_count; /* maximum number of blocks in one req */
206 unsigned int max_busy_timeout; /* max busy timeout in ms */
207 struct rt_mmcsd_io_cfg ios; /* current io bus settings */
208 unsigned int retune_period;
209 /* group bitfields together to minimize padding */
210 unsigned int use_spi_crc : 1;
211 unsigned int claimed : 1; /* host exclusively claimed */
212 unsigned int doing_init_tune : 1; /* initial tuning in progress */
213 unsigned int can_retune : 1; /* re-tuning can be used */
214 unsigned int doing_retune : 1; /* re-tuning in progress */
215 unsigned int retune_now : 1; /* do re-tuning at next req */
216 unsigned int retune_paused : 1; /* re-tuning is temporarily disabled */
217 unsigned int retune_crc_disable : 1; /* don't trigger retune upon crc */
218 unsigned int can_dma_map_merge : 1; /* merging can be used */
219 unsigned int vqmmc_enabled : 1; /* vqmmc regulator is enabled */
220
221 int need_retune; /* re-tuning is needed */
222 int hold_retune; /* hold off re-tuning */
223 rt_bool_t trigger_card_event; /* card_event necessary */
224 unsigned int sdio_irqs;
225 rt_bool_t sdio_irq_pending;
226
227 struct led_trigger *led; /* activity led */
228
229 struct mmc_supply supply;
230
231
232 /* Ongoing data transfer that allows commands during transfer */
233 struct rt_mmcsd_req *ongoing_mrq;
234
235
236 unsigned int actual_clock; /* Actual HC clock rate */
237 rt_uint32_t pm_caps;
238 unsigned long private[];
239 };
240
241
mmc_card_is_removable(struct rt_mmc_host * host)242 static inline int mmc_card_is_removable(struct rt_mmc_host *host)
243 {
244 return !(host->caps & MMC_CAP_NONREMOVABLE);
245 }
246
247 struct device_node;
248 struct rt_mmc_host *rt_mmc_alloc_host(int extra, struct rt_device *);
249 int rt_mmc_add_host(struct rt_mmc_host *);
250 void rt_mmc_remove_host(struct rt_mmc_host *);
251 void rt_mmc_free_host(struct rt_mmc_host *);
252 int rt_mmc_of_parse(struct rt_mmc_host *host);
253 int rt_mmc_of_parse_voltage(struct rt_mmc_host *host, rt_uint32_t *mask);
254
mmc_priv(struct rt_mmc_host * host)255 static inline void *mmc_priv(struct rt_mmc_host *host)
256 {
257 return (void *)host->private;
258 }
259
260
261 #define mmc_host_is_spi(host) ((host)->caps & MMC_CAP_SPI)
262
263 #define mmc_dev(x) ((x)->parent)
264 #define mmc_classdev(x) (&(x)->class_dev)
265 #define mmc_hostname(x) (x->parent->parent.name)
266
267 void rt_mmc_detect_change(struct rt_mmc_host *, unsigned long delay);
268 void rt_mmc_request_done(struct rt_mmc_host *, struct rt_mmcsd_req *);
269 void mmc_command_done(struct rt_mmc_host *host, struct rt_mmcsd_req *mrq);
270
271 void mmc_cqe_request_done(struct rt_mmc_host *host, struct rt_mmcsd_req *mrq);
272
sdio_irq_claimed(struct rt_mmc_host * host)273 static inline rt_bool_t sdio_irq_claimed(struct rt_mmc_host *host)
274 {
275 return host->sdio_irqs > 0;
276 }
277
mmc_regulator_set_ocr(struct rt_mmc_host * mmc,struct regulator * supply,unsigned short vdd_bit)278 static inline int mmc_regulator_set_ocr(struct rt_mmc_host *mmc,
279 struct regulator *supply,
280 unsigned short vdd_bit)
281 {
282 return 0;
283 }
284
285 int mmc_regulator_get_supply(struct rt_mmc_host *mmc);
286 int mmc_regulator_enable_vqmmc(struct rt_mmc_host *mmc);
287 void mmc_regulator_disable_vqmmc(struct rt_mmc_host *mmc);
288
289 void mmc_retune_timer_stop(struct rt_mmc_host* host);
290
291 enum dma_data_direction
292 {
293 DMA_BIDIRECTIONAL = 0,
294 DMA_TO_DEVICE = 1,
295 DMA_FROM_DEVICE = 2,
296 DMA_NONE = 3,
297 };
298 #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL << (n)) - 1))
mmc_retune_needed(struct rt_mmc_host * host)299 static inline void mmc_retune_needed(struct rt_mmc_host *host)
300 {
301 if (host->can_retune)
302 host->need_retune = 1;
303 }
304
mmc_can_retune(struct rt_mmc_host * host)305 static inline rt_bool_t mmc_can_retune(struct rt_mmc_host *host)
306 {
307 return host->can_retune == 1;
308 }
309
mmc_doing_retune(struct rt_mmc_host * host)310 static inline rt_bool_t mmc_doing_retune(struct rt_mmc_host *host)
311 {
312 return host->doing_retune == 1;
313 }
314
mmc_doing_tune(struct rt_mmc_host * host)315 static inline rt_bool_t mmc_doing_tune(struct rt_mmc_host *host)
316 {
317 return host->doing_retune == 1 || host->doing_init_tune == 1;
318 }
319
mmc_get_dma_dir(struct rt_mmcsd_data * data)320 static inline int mmc_get_dma_dir(struct rt_mmcsd_data *data)
321 {
322 return data->flags & DATA_DIR_WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
323 }
324
mmc_op_multi(rt_uint32_t opcode)325 static inline rt_bool_t mmc_op_multi(rt_uint32_t opcode)
326 {
327 return opcode == MMC_WRITE_MULTIPLE_BLOCK || opcode == MMC_READ_MULTIPLE_BLOCK;
328 }
329
mmc_op_tuning(rt_uint32_t opcode)330 static inline rt_bool_t mmc_op_tuning(rt_uint32_t opcode)
331 {
332 return opcode == MMC_SEND_TUNING_BLOCK || opcode == MMC_SEND_TUNING_BLOCK_HS200;
333 }
334
335 int rt_mmc_gpio_get_cd(struct rt_mmc_host *host);
336 void rt_mmc_detect_change(struct rt_mmc_host *host, unsigned long delay);
337 int rt_mmc_regulator_set_vqmmc(struct rt_mmc_host *mmc, struct rt_mmcsd_io_cfg *ios);
338 rt_bool_t rt_mmc_can_gpio_ro(struct rt_mmc_host *host);
339 int rt_mmc_gpio_get_ro(struct rt_mmc_host *host);
340
341 int rt_mmc_send_abort_tuning(struct rt_mmc_host *host, rt_uint32_t opcode);
342 int rt_mmc_of_parse(struct rt_mmc_host *host);
343
344
345 #endif
346