1 /*
2 * Copyright (c) 2006-2022, RT-Thread Development Team
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Change Logs:
7 * Date Author Notes
8 * 2022-11-16 GuEe-GUI first version
9 */
10
11 #include <rtatomic.h>
12 #include <drivers/serial_dm.h>
13
14 static int uid_min = -1;
15 static volatile rt_atomic_t uid = 0;
16
serial_dev_set_name(struct rt_serial_device * sdev)17 int serial_dev_set_name(struct rt_serial_device *sdev)
18 {
19 int id = -1;
20
21 RT_ASSERT(sdev != RT_NULL);
22
23 #ifdef RT_USING_OFW
24 if (sdev->parent.ofw_node)
25 {
26 id = rt_ofw_get_alias_id(sdev->parent.ofw_node, "serial");
27
28 if (id < 0)
29 {
30 id = rt_ofw_get_alias_id(sdev->parent.ofw_node, "uart");
31 }
32 }
33 #endif
34
35 if (id < 0)
36 {
37 id = (int)rt_hw_atomic_add(&uid, 1);
38 }
39
40 return rt_dm_dev_set_name(&sdev->parent, "uart%u", id);
41 }
42
serial_dm_naming_framework_init(void)43 static int serial_dm_naming_framework_init(void)
44 {
45 #ifdef RT_USING_OFW
46 uid_min = rt_ofw_get_alias_last_id("serial");
47
48 if (uid_min < 0)
49 {
50 uid_min = rt_ofw_get_alias_last_id("uart");
51 }
52
53 uid_min = uid_min < 0 ? 0 : (uid_min + 1);
54
55 rt_hw_atomic_store(&uid, uid_min);
56 #endif
57
58 return 0;
59 }
60 INIT_PLATFORM_EXPORT(serial_dm_naming_framework_init);
61
serial_base_from_args(char * str)62 void *serial_base_from_args(char *str)
63 {
64 rt_ubase_t base = 0;
65
66 while (*str && !(*str == 'x' || *str == 'X'))
67 {
68 ++str;
69 }
70 ++str;
71
72 /* The str may get from bootargs that we need check it */
73 while (*str)
74 {
75 if ((*str >= 'a' && *str <= 'f') || (*str >= 'A' && *str <= 'F'))
76 {
77 base = (base << 4) | (((*str | ' ') - 'a') + 10);
78 }
79 else if (*str >= '0' && *str <= '9')
80 {
81 base = (base << 4) | (*str - '0');
82 }
83 else break;
84
85 ++str;
86 }
87
88 return (void *)base;
89 }
90
serial_cfg_from_args(char * _str)91 struct serial_configure serial_cfg_from_args(char *_str)
92 {
93 char *str = _str;
94 struct serial_configure cfg = RT_SERIAL_CONFIG_DEFAULT;
95
96 /* Format baudrate/parity/bits/flow (BBBBPNF), Default is 115200n8 */
97 if (str && *str)
98 {
99 rt_uint32_t baudrate = 0;
100
101 /* BBBB is the speed */
102 while (*str && (*str >= '0' && *str <= '9'))
103 {
104 baudrate *= 10;
105 baudrate += *str - '0';
106 ++str;
107 }
108
109 if (baudrate)
110 {
111 cfg.baud_rate = baudrate;
112 }
113
114 /* P is parity (n/o/e) */
115 switch (*str)
116 {
117 case 'n':
118 cfg.parity = PARITY_NONE;
119 break;
120 case 'o':
121 cfg.parity = PARITY_ODD;
122 break;
123 case 'e':
124 cfg.parity = PARITY_EVEN;
125 break;
126 default:
127 --str;
128 break;
129 }
130 ++str;
131
132 /* N is number of bits */
133 if (*str && (*str >= '0' && *str <= '9'))
134 {
135 cfg.data_bits = *str - '0';
136 ++str;
137 }
138
139 /* F is flow ontrol ('r' for RTS) */
140 if (*str)
141 {
142 cfg.flowcontrol = (*str == 'r' ? RT_SERIAL_FLOWCONTROL_CTSRTS : RT_SERIAL_FLOWCONTROL_NONE);
143 ++str;
144 }
145
146 #ifdef RT_USING_OFW
147 if (*str == '\0')
148 {
149 const char earlycon_magic[] = { 'O', 'F', 'W', '\0' };
150
151 if (!rt_strcmp(++str, earlycon_magic))
152 {
153 /* Is OFW earlycon, we should ACK it */
154 rt_memset(str, 0, RT_ARRAY_SIZE(earlycon_magic));
155 }
156 }
157 #endif
158 }
159
160 return cfg;
161 }
162