1 /*
2 * Copyright (c) 2006-2023, RT-Thread Development Team
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Change Logs:
7 * Date Author Notes
8 * 2023-03-17 WangXiaoyao cache API unit test
9 */
10 #ifndef __TEST_CACHE_AARCH64_H__
11 #define __TEST_CACHE_AARCH64_H__
12
13 #include "common.h"
14 #include <cache.h>
15
16 const char *platform_cache_not_guarantee = "Cannot guarantee cache operation works";
17
18 /**
19 * ==============================================================
20 * TEST FEATURE
21 * API under cache.h
22 *
23 * void rt_hw_icache_invalidate_range(unsigned long start_addr, int size);
24 * void rt_hw_cpu_icache_invalidate(void *addr, rt_size_t size);
25 * void rt_hw_cpu_dcache_clean_and_invalidate(void *addr, rt_size_t size);
26 * ==============================================================
27 */
28
_get1_const(void)29 static int _get1_const(void)
30 {
31 return 1;
32 }
33
_get1(void)34 static int _get1(void)
35 {
36 return 1;
37 }
38
_get2(void)39 static int _get2(void)
40 {
41 return 2;
42 }
43
44 /* hot patching codes and test if the value can be seen by icache */
_test_icache_invalidate_range(void)45 static void _test_icache_invalidate_range(void)
46 {
47 /* reset _get1 */
48 rt_memcpy(_get1, _get1_const, _get2 - _get1);
49 rt_hw_cpu_dcache_clean(_get1, _get2 - _get1);
50 rt_hw_cpu_icache_invalidate(_get1, _get2 - _get1);
51 uassert_true(1 == _get1());
52
53 /* now copy _get2 to _get1 */
54 rt_memcpy(_get1, _get2, _get2 - _get1);
55 if (1 != _get1())
56 LOG_W(platform_cache_not_guarantee);
57
58 rt_hw_cpu_dcache_clean(_get1, _get2 - _get1);
59 rt_hw_cpu_icache_invalidate(_get1, _get2 - _get1);
60 __asm__ volatile("isb");
61 uassert_true(2 == _get1());
62 LOG_I("%s ok", __func__);
63 }
64
65 /* due to hardware feature of cortex-a, we should done this on 2 separated cpu */
_test_dcache_clean_and_invalidate(void)66 static void _test_dcache_clean_and_invalidate(void)
67 {
68 const size_t padding = 1024 * 2;
69 const size_t buf_sz = ARCH_PAGE_SIZE * 2;
70 volatile char *remap_nocache;
71 char *page = rt_pages_alloc(rt_page_bits(buf_sz));
72 uassert_true(!!page);
73
74 rt_memset(page, 0xab, buf_sz);
75 rt_hw_cpu_dcache_invalidate(page, buf_sz);
76
77 int _outdate_flag = 0;
78 if (memtest(page, 0xab, buf_sz))
79 _outdate_flag = 1;
80
81 /* after ioremap, we can access system memory to verify outcome */
82 remap_nocache = rt_ioremap(page + PV_OFFSET, buf_sz);
83
84 rt_hw_cpu_dcache_clean(page + padding, ARCH_PAGE_SIZE);
85 memtest(remap_nocache + padding, 0xab, ARCH_PAGE_SIZE);
86
87 if (!_outdate_flag)
88 LOG_W(platform_cache_not_guarantee);
89 else
90 LOG_I("%s ok", __func__);
91
92 rt_pages_free(page, 0);
93 rt_iounmap(remap_nocache);
94 }
95
utest_tc_init(void)96 static rt_err_t utest_tc_init(void)
97 {
98 return RT_EOK;
99 }
100
utest_tc_cleanup(void)101 static rt_err_t utest_tc_cleanup(void)
102 {
103 return RT_EOK;
104 }
105
testcase(void)106 static void testcase(void)
107 {
108 /* todo: format API under cache.h first */
109 UTEST_UNIT_RUN(_test_icache_invalidate_range);
110 UTEST_UNIT_RUN(_test_dcache_clean_and_invalidate);
111 }
112
113 UTEST_TC_EXPORT(testcase, "testcases.libcpu.cache", utest_tc_init, utest_tc_cleanup, 10);
114
115 #endif /* __TEST_CACHE_AARCH64_H__ */
116