1 /* 2 * Copyright (c) 2006-2021, RT-Thread Development Team 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 * 6 * Change Logs: 7 * Date Author Notes 8 * 2012-01-10 bernard porting to AM1808 9 */ 10 11 #ifndef __MMU_H__ 12 #define __MMU_H__ 13 14 #include <rtthread.h> 15 16 #define DESC_SEC (0x2) 17 #define CB (3<<2) //cache_on, write_back 18 #define CNB (2<<2) //cache_on, write_through 19 #define NCB (1<<2) //cache_off,WR_BUF on 20 #define NCNB (0<<2) //cache_off,WR_BUF off 21 #define AP_RW (3<<10) //supervisor=RW, user=RW 22 #define AP_RO (2<<10) //supervisor=RW, user=RO 23 24 #define DOMAIN_FAULT (0x0) 25 #define DOMAIN_CHK (0x1) 26 #define DOMAIN_NOTCHK (0x3) 27 #define DOMAIN0 (0x0<<5) 28 #define DOMAIN1 (0x1<<5) 29 30 #define DOMAIN0_ATTR (DOMAIN_CHK<<0) 31 #define DOMAIN1_ATTR (DOMAIN_FAULT<<2) 32 33 #define RW_CB (AP_RW|DOMAIN0|CB|DESC_SEC) /* Read/Write, cache, write back */ 34 #define RW_CNB (AP_RW|DOMAIN0|CNB|DESC_SEC) /* Read/Write, cache, write through */ 35 #define RW_NCNB (AP_RW|DOMAIN0|NCNB|DESC_SEC) /* Read/Write without cache and write buffer */ 36 #define RW_FAULT (AP_RW|DOMAIN1|NCNB|DESC_SEC) /* Read/Write without cache and write buffer */ 37 38 void rt_hw_mmu_init(void); 39 40 #endif 41