1 /*
2 * Copyright (c) 2006-2021, RT-Thread Development Team
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Change Logs:
7 * Date Author Notes
8 * 2013-07-20 Bernard first version
9 */
10
11 #include <rthw.h>
12 #include <rtthread.h>
13 #include <board.h>
14 #include <backtrace.h>
15
16 #include "interrupt.h"
17 #include "mm_fault.h"
18
19 #include <rtdbg.h>
20
21 #ifdef RT_USING_FINSH
22 extern long list_thread(void);
23 #endif
24
25 #ifdef RT_USING_SMART
26 #include <lwp.h>
27 #include <lwp_arch.h>
28
29 #ifdef LWP_USING_CORE_DUMP
30 #include <lwp_core_dump.h>
31 #endif
32
check_user_fault(struct rt_hw_exp_stack * regs,uint32_t pc_adj,char * info)33 void check_user_fault(struct rt_hw_exp_stack *regs, uint32_t pc_adj, char *info)
34 {
35 uint32_t mode = regs->cpsr;
36
37 if ((mode & 0x1f) == 0x10)
38 {
39 rt_kprintf("%s! pc = 0x%08x\n", info, regs->pc - pc_adj);
40 #ifdef LWP_USING_CORE_DUMP
41 lwp_core_dump(regs, pc_adj);
42 #endif
43 sys_exit_group(-1);
44 }
45 }
46
check_data_abort(struct rt_hw_exp_stack * regs)47 int check_data_abort(struct rt_hw_exp_stack *regs)
48 {
49 struct rt_lwp *lwp;
50 void *dfar = RT_NULL;
51 rt_base_t dfsr = RT_NULL;
52 __asm__ volatile("mrc p15, 0, %0, c6, c0, 0" : "=r"(dfar));
53 __asm__ volatile("mrc p15, 0, %0, c5, c0, 0" : "=r"(dfsr));
54
55 struct rt_aspace_fault_msg msg = {
56 .fault_op = MM_FAULT_OP_WRITE,
57 .fault_type = MM_FAULT_TYPE_PAGE_FAULT,
58 .fault_vaddr = dfar,
59 };
60 lwp = lwp_self();
61 if (lwp && rt_aspace_fault_try_fix(lwp->aspace, &msg))
62 {
63 regs->pc -= 8;
64 return 1;
65 }
66
67 return 0;
68 }
69
check_prefetch_abort(struct rt_hw_exp_stack * regs)70 int check_prefetch_abort(struct rt_hw_exp_stack *regs)
71 {
72 struct rt_lwp *lwp;
73 void *ifar = RT_NULL;
74 rt_base_t ifsr = RT_NULL;
75 __asm__ volatile("mrc p15, 0, %0, c6, c0, 2" : "=r"(ifar));
76 __asm__ volatile("mrc p15, 0, %0, c5, c0, 1" : "=r"(ifsr));
77
78 struct rt_aspace_fault_msg msg = {
79 .fault_op = MM_FAULT_OP_READ,
80 .fault_type = MM_FAULT_TYPE_PAGE_FAULT,
81 .fault_vaddr = ifar,
82 };
83 lwp = lwp_self();
84 if (lwp && rt_aspace_fault_try_fix(lwp->aspace, &msg))
85 {
86 regs->pc -= 4;
87 return 1;
88 }
89
90 return 0;
91 }
92 #endif
93
94 /**
95 * this function will show registers of CPU
96 *
97 * @param regs the registers point
98 */
rt_hw_show_register(struct rt_hw_exp_stack * regs)99 void rt_hw_show_register(struct rt_hw_exp_stack *regs)
100 {
101 rt_kprintf("Execption:\n");
102 rt_kprintf("r00:0x%08x r01:0x%08x r02:0x%08x r03:0x%08x\n", regs->r0, regs->r1, regs->r2, regs->r3);
103 rt_kprintf("r04:0x%08x r05:0x%08x r06:0x%08x r07:0x%08x\n", regs->r4, regs->r5, regs->r6, regs->r7);
104 rt_kprintf("r08:0x%08x r09:0x%08x r10:0x%08x\n", regs->r8, regs->r9, regs->r10);
105 rt_kprintf("fp :0x%08x ip :0x%08x\n", regs->fp, regs->ip);
106 rt_kprintf("sp :0x%08x lr :0x%08x pc :0x%08x\n", regs->sp, regs->lr, regs->pc);
107 rt_kprintf("cpsr:0x%08x\n", regs->cpsr);
108 #ifdef RT_USING_SMART
109 {
110 uint32_t v;
111 asm volatile ("MRC p15, 0, %0, c5, c0, 0":"=r"(v));
112 rt_kprintf("dfsr:0x%08x\n", v);
113 asm volatile ("MRC p15, 0, %0, c2, c0, 0":"=r"(v));
114 rt_kprintf("ttbr0:0x%08x\n", v);
115 asm volatile ("MRC p15, 0, %0, c6, c0, 0":"=r"(v));
116 rt_kprintf("dfar:0x%08x\n", v);
117 rt_kprintf("0x%08x -> 0x%08x\n", v, rt_kmem_v2p((void *)v));
118 }
119 #endif
120 }
121
122 /**
123 * When comes across an instruction which it cannot handle,
124 * it takes the undefined instruction trap.
125 *
126 * @param regs system registers
127 *
128 * @note never invoke this function in application
129 */
130 #ifdef RT_USING_FPU
131 void set_fpexc(rt_uint32_t val);
132 #endif
rt_hw_trap_undef(struct rt_hw_exp_stack * regs)133 void rt_hw_trap_undef(struct rt_hw_exp_stack *regs)
134 {
135 #ifdef RT_USING_FPU
136 {
137 uint32_t ins;
138 uint32_t addr;
139
140 if (regs->cpsr & (1 << 5))
141 {
142 /* thumb mode */
143 addr = regs->pc - 2;
144 ins = (uint32_t)*(uint16_t *)addr;
145 if ((ins & (3 << 11)) != 0)
146 {
147 /* 32 bit ins */
148 ins <<= 16;
149 ins += *(uint16_t *)(addr + 2);
150 }
151 }
152 else
153 {
154 addr = regs->pc - 4;
155 ins = *(uint32_t *)addr;
156 }
157 if ((ins & 0xe00) == 0xa00)
158 {
159 /* float ins */
160 set_fpexc(1U << 30);
161 regs->pc = addr;
162 return;
163 }
164 }
165 #endif
166 #ifdef RT_USING_SMART
167 check_user_fault(regs, 4, "User undefined instruction");
168 #endif
169 rt_unwind(regs, 4);
170 rt_kprintf("undefined instruction:\n");
171 rt_hw_show_register(regs);
172 #ifdef RT_USING_FINSH
173 list_thread();
174 #endif
175 rt_hw_cpu_shutdown();
176 }
177
178 /**
179 * The software interrupt instruction (SWI) is used for entering
180 * Supervisor mode, usually to request a particular supervisor
181 * function.
182 *
183 * @param regs system registers
184 *
185 * @note never invoke this function in application
186 */
rt_hw_trap_swi(struct rt_hw_exp_stack * regs)187 void rt_hw_trap_swi(struct rt_hw_exp_stack *regs)
188 {
189 rt_kprintf("software interrupt:\n");
190 rt_hw_show_register(regs);
191 #ifdef RT_USING_FINSH
192 list_thread();
193 #endif
194 rt_hw_cpu_shutdown();
195 }
196
197 /**
198 * An abort indicates that the current memory access cannot be completed,
199 * which occurs during an instruction prefetch.
200 *
201 * @param regs system registers
202 *
203 * @note never invoke this function in application
204 */
rt_hw_trap_pabt(struct rt_hw_exp_stack * regs)205 void rt_hw_trap_pabt(struct rt_hw_exp_stack *regs)
206 {
207 #ifdef RT_USING_SMART
208 if (dbg_check_event(regs, 4))
209 {
210 return;
211 }
212 if (check_prefetch_abort(regs))
213 {
214 return;
215 }
216 check_user_fault(regs, 4, "User prefetch abort");
217 #endif
218 rt_unwind(regs, 4);
219 rt_kprintf("prefetch abort:\n");
220 rt_hw_show_register(regs);
221 #ifdef RT_USING_FINSH
222 list_thread();
223 #endif
224 rt_hw_cpu_shutdown();
225 }
226
227 /**
228 * An abort indicates that the current memory access cannot be completed,
229 * which occurs during a data access.
230 *
231 * @param regs system registers
232 *
233 * @note never invoke this function in application
234 */
rt_hw_trap_dabt(struct rt_hw_exp_stack * regs)235 void rt_hw_trap_dabt(struct rt_hw_exp_stack *regs)
236 {
237 #ifdef RT_USING_SMART
238 if (dbg_check_event(regs, 8))
239 {
240 return;
241 }
242 if (check_data_abort(regs))
243 {
244 return;
245 }
246 check_user_fault(regs, 8, "User data abort");
247 #endif
248 rt_unwind(regs, 8);
249 rt_kprintf("data abort:");
250 rt_hw_show_register(regs);
251 #ifdef RT_USING_FINSH
252 list_thread();
253 #endif
254 rt_hw_cpu_shutdown();
255 }
256
257 /**
258 * Normally, system will never reach here
259 *
260 * @param regs system registers
261 *
262 * @note never invoke this function in application
263 */
rt_hw_trap_resv(struct rt_hw_exp_stack * regs)264 void rt_hw_trap_resv(struct rt_hw_exp_stack *regs)
265 {
266 rt_kprintf("reserved trap:\n");
267 rt_hw_show_register(regs);
268 #ifdef RT_USING_FINSH
269 list_thread();
270 #endif
271 rt_hw_cpu_shutdown();
272 }
273
rt_hw_trap_irq(void)274 void rt_hw_trap_irq(void)
275 {
276 #ifdef SOC_BCM283x
277 extern rt_uint8_t core_timer_flag;
278 void *param;
279 uint32_t irq;
280 rt_isr_handler_t isr_func;
281 extern struct rt_irq_desc isr_table[];
282 uint32_t value = 0;
283 value = IRQ_PEND_BASIC & 0x3ff;
284
285 if(core_timer_flag != 0)
286 {
287 uint32_t cpu_id = rt_hw_cpu_id();
288 uint32_t int_source = CORE_IRQSOURCE(cpu_id);
289 if (int_source & 0x0f)
290 {
291 if (int_source & 0x08)
292 {
293 isr_func = isr_table[IRQ_ARM_TIMER].handler;
294 #ifdef RT_USING_INTERRUPT_INFO
295 isr_table[IRQ_ARM_TIMER].counter++;
296 #endif
297 if (isr_func)
298 {
299 param = isr_table[IRQ_ARM_TIMER].param;
300 isr_func(IRQ_ARM_TIMER, param);
301 }
302 }
303 }
304 }
305
306 /* local interrupt*/
307 if (value)
308 {
309 if (value & (1 << 8))
310 {
311 value = IRQ_PEND1;
312 irq = __rt_ffs(value) - 1;
313 }
314 else if (value & (1 << 9))
315 {
316 value = IRQ_PEND2;
317 irq = __rt_ffs(value) + 31;
318 }
319 else
320 {
321 value &= 0x0f;
322 irq = __rt_ffs(value) + 63;
323 }
324
325 /* get interrupt service routine */
326 isr_func = isr_table[irq].handler;
327 #ifdef RT_USING_INTERRUPT_INFO
328 isr_table[irq].counter++;
329 #endif
330 if (isr_func)
331 {
332 /* Interrupt for myself. */
333 param = isr_table[irq].param;
334 /* turn to interrupt service routine */
335 isr_func(irq, param);
336 }
337 }
338 #else
339 void *param;
340 int ir, ir_real;
341 rt_isr_handler_t isr_func;
342 extern struct rt_irq_desc isr_table[];
343
344 ir = rt_hw_interrupt_get_irq();
345
346 ir_real = ir & 0x3ff;
347 if (ir == 1023)
348 {
349 /* Spurious interrupt */
350 return;
351 }
352
353 /* get interrupt service routine */
354 isr_func = isr_table[ir_real].handler;
355 #ifdef RT_USING_INTERRUPT_INFO
356 isr_table[ir_real].counter++;
357 #endif
358 if (isr_func)
359 {
360 /* Interrupt for myself. */
361 param = isr_table[ir_real].param;
362 /* turn to interrupt service routine */
363 isr_func(ir, param);
364 }
365
366 /* end of interrupt */
367 rt_hw_interrupt_ack(ir);
368 #endif
369 }
370
rt_hw_trap_fiq(void)371 void rt_hw_trap_fiq(void)
372 {
373 void *param;
374 int ir;
375 rt_isr_handler_t isr_func;
376 extern struct rt_irq_desc isr_table[];
377
378 ir = rt_hw_interrupt_get_irq();
379
380 /* get interrupt service routine */
381 isr_func = isr_table[ir].handler;
382 param = isr_table[ir].param;
383
384 /* turn to interrupt service routine */
385 isr_func(ir, param);
386
387 /* end of interrupt */
388 rt_hw_interrupt_ack(ir);
389 }
390
391