1;/*
2; * Copyright (c) 2006-2019, RT-Thread Development Team
3; *
4; * SPDX-License-Identifier: Apache-2.0
5; *
6; * Change Logs:
7; * Date           Author       Notes
8; * 2010-01-25     Bernard      first version
9; * 2012-06-01     aozima       set pendsv priority to 0xFF.
10; * 2012-08-17     aozima       fixed bug: store r8 - r11.
11; * 2013-06-18     aozima       add restore MSP feature.
12; * 2019-03-31     xuzhuoyi     port to Cortex-M23.
13; */
14
15;/**
16; * @addtogroup CORTEX-M23
17; */
18;/*@{*/
19
20SCB_VTOR        EQU     0xE000ED08               ; Vector Table Offset Register
21NVIC_INT_CTRL   EQU     0xE000ED04               ; interrupt control state register
22NVIC_SHPR3      EQU     0xE000ED20               ; system priority register (2)
23NVIC_PENDSV_PRI EQU     0xFFFF0000               ; PendSV and SysTick priority value (lowest)
24NVIC_PENDSVSET  EQU     0x10000000               ; value to trigger PendSV exception
25
26    SECTION    .text:CODE(2)
27    THUMB
28    REQUIRE8
29    PRESERVE8
30
31    IMPORT rt_thread_switch_interrupt_flag
32    IMPORT rt_interrupt_from_thread
33    IMPORT rt_interrupt_to_thread
34
35;/*
36; * rt_base_t rt_hw_interrupt_disable();
37; */
38    EXPORT rt_hw_interrupt_disable
39rt_hw_interrupt_disable:
40    MRS     r0, PRIMASK
41    CPSID   I
42    BX      LR
43
44;/*
45; * void rt_hw_interrupt_enable(rt_base_t level);
46; */
47    EXPORT  rt_hw_interrupt_enable
48rt_hw_interrupt_enable:
49    MSR     PRIMASK, r0
50    BX      LR
51
52;/*
53; * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
54; * r0 --> from
55; * r1 --> to
56; */
57    EXPORT rt_hw_context_switch_interrupt
58    EXPORT rt_hw_context_switch
59rt_hw_context_switch_interrupt:
60rt_hw_context_switch:
61    ; set rt_thread_switch_interrupt_flag to 1
62    LDR     r2, =rt_thread_switch_interrupt_flag
63    LDR     r3, [r2]
64    CMP     r3, #1
65    BEQ     _reswitch
66    MOVS    r3, #0x1
67    STR     r3, [r2]
68
69    LDR     r2, =rt_interrupt_from_thread   ; set rt_interrupt_from_thread
70    STR     r0, [r2]
71
72_reswitch
73    LDR     r2, =rt_interrupt_to_thread     ; set rt_interrupt_to_thread
74    STR     r1, [r2]
75
76    LDR     r0, =NVIC_INT_CTRL              ; trigger the PendSV exception (causes context switch)
77    LDR     r1, =NVIC_PENDSVSET
78    STR     r1, [r0]
79    BX      LR
80
81; r0 --> switch from thread stack
82; r1 --> switch to thread stack
83; psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
84    EXPORT PendSV_Handler
85PendSV_Handler:
86
87    ; disable interrupt to protect context switch
88    MRS     r2, PRIMASK
89    CPSID   I
90
91    ; get rt_thread_switch_interrupt_flag
92    LDR     r0, =rt_thread_switch_interrupt_flag
93    LDR     r1, [r0]
94    CMP     r1, #0x00
95    BEQ     pendsv_exit                ; pendsv already handled
96
97    ; clear rt_thread_switch_interrupt_flag to 0
98    MOVS    r1, #0x00
99    STR     r1, [r0]
100
101    LDR     r0, =rt_interrupt_from_thread
102    LDR     r1, [r0]
103    CMP     r1, #0x00
104    BEQ     switch_to_thread        ; skip register save at the first time
105
106    MRS     r1, psp                 ; get from thread stack pointer
107
108    SUBS    r1, r1, #0x20           ; space for {r4 - r7} and {r8 - r11}
109    LDR     r0, [r0]
110    STR     r1, [r0]                ; update from thread stack pointer
111
112    STMIA   r1!, {r4 - r7}          ; push thread {r4 - r7} register to thread stack
113
114    MOV     r4, r8                  ; mov thread {r8 - r11} to {r4 - r7}
115    MOV     r5, r9
116    MOV     r6, r10
117    MOV     r7, r11
118    STMIA   r1!, {r4 - r7}          ; push thread {r8 - r11} high register to thread stack
119
120switch_to_thread
121    LDR     r1, =rt_interrupt_to_thread
122    LDR     r1, [r1]
123    LDR     r1, [r1]                ; load thread stack pointer
124
125    LDMIA   r1!, {r4 - r7}          ; pop thread {r4 - r7} register from thread stack
126    PUSH    {r4 - r7}               ; push {r4 - r7} to MSP for copy {r8 - r11}
127
128    LDMIA   r1!, {r4 - r7}          ; pop thread {r8 - r11} high register from thread stack to {r4 - r7}
129    MOV     r8,  r4                 ; mov {r4 - r7} to {r8 - r11}
130    MOV     r9,  r5
131    MOV     r10, r6
132    MOV     r11, r7
133
134    POP     {r4 - r7}               ; pop {r4 - r7} from MSP
135
136    MSR     psp, r1                 ; update stack pointer
137
138pendsv_exit
139    ; restore interrupt
140    MSR     PRIMASK, r2
141
142    MOVS    r0, #0x03
143    RSBS    r0, r0, #0x00
144    BX      r0
145
146;/*
147; * void rt_hw_context_switch_to(rt_uint32 to);
148; * r0 --> to
149; * this fucntion is used to perform the first thread switch
150; */
151    EXPORT rt_hw_context_switch_to
152rt_hw_context_switch_to:
153    ; set to thread
154    LDR     r1, =rt_interrupt_to_thread
155    STR     r0, [r1]
156
157    ; set from thread to 0
158    LDR     r1, =rt_interrupt_from_thread
159    MOVS    r0, #0x0
160    STR     r0, [r1]
161
162    ; set interrupt flag to 1
163    LDR     r1, =rt_thread_switch_interrupt_flag
164    MOVS    r0, #1
165    STR     r0, [r1]
166
167    ; set the PendSV and SysTick exception priority
168    LDR     r0, =NVIC_SHPR3
169    LDR     r1, =NVIC_PENDSV_PRI
170    LDR     r2, [r0,#0x00]       ; read
171    ORRS    r1,r1,r2             ; modify
172    STR     r1, [r0]             ; write-back
173
174    ; trigger the PendSV exception (causes context switch)
175    LDR     r0, =NVIC_INT_CTRL
176    LDR     r1, =NVIC_PENDSVSET
177    STR     r1, [r0]
178    NOP
179
180    ; restore MSP
181    LDR     r0, =SCB_VTOR
182    LDR     r0, [r0]
183    LDR     r0, [r0]
184    NOP
185    MSR     msp, r0
186
187    ; enable interrupts at processor level
188    CPSIE   I
189
190    ; ensure PendSV exception taken place before subsequent operation
191    DSB
192    ISB
193
194    ; never reach here!
195
196; compatible with old version
197    EXPORT rt_hw_interrupt_thread_switch
198rt_hw_interrupt_thread_switch:
199    BX      lr
200
201    IMPORT rt_hw_hard_fault_exception
202    EXPORT HardFault_Handler
203HardFault_Handler:
204
205    ; get current context
206    MRS     r0, psp                 ; get fault thread stack pointer
207    PUSH    {lr}
208    BL      rt_hw_hard_fault_exception
209    POP     {pc}
210
211    END
212