1 /*
2  * Copyright (c) 2011-2024, Shanghai Real-Thread Electronic Technology Co.,Ltd
3  *
4  * Change Logs:
5  * Date           Author       Notes
6  * 2022-08-29     RT-Thread    first version
7  */
8 
9 
10 #ifndef  CPUPORT_H__
11 #define  CPUPORT_H__
12 
13 /* the exception stack without VFP registers */
14 struct rt_hw_exp_stack
15 {
16     unsigned long r0;
17     unsigned long r1;
18     unsigned long r2;
19     unsigned long r3;
20     unsigned long r4;
21     unsigned long r5;
22     unsigned long r6;
23     unsigned long r7;
24     unsigned long r8;
25     unsigned long r9;
26     unsigned long r10;
27     unsigned long fp;
28     unsigned long ip;
29     unsigned long sp;
30     unsigned long lr;
31     unsigned long pc;
32     unsigned long cpsr;
33 };
34 
35 struct rt_hw_stack
36 {
37     unsigned long cpsr;
38     unsigned long r0;
39     unsigned long r1;
40     unsigned long r2;
41     unsigned long r3;
42     unsigned long r4;
43     unsigned long r5;
44     unsigned long r6;
45     unsigned long r7;
46     unsigned long r8;
47     unsigned long r9;
48     unsigned long r10;
49     unsigned long fp;
50     unsigned long ip;
51     unsigned long lr;
52     unsigned long pc;
53 };
54 
55 #define USERMODE    0x10
56 #define FIQMODE     0x11
57 #define IRQMODE     0x12
58 #define SVCMODE     0x13
59 #define MONITORMODE 0x16
60 #define ABORTMODE   0x17
61 #define HYPMODE     0x1b
62 #define UNDEFMODE   0x1b
63 #define MODEMASK    0x1f
64 #define NOINT       0xc0
65 
66 #define T_Bit       (1<<5)
67 #define F_Bit       (1<<6)
68 #define I_Bit       (1<<7)
69 #define A_Bit       (1<<8)
70 #define E_Bit       (1<<9)
71 #define J_Bit       (1<<24)
72 
73 
74 // rt_inline void rt_hw_isb(void)
75 // {
76 //     __asm volatile ("isb":::"memory");
77 // }
78 
79 // rt_inline void rt_hw_dmb(void)
80 // {
81 //     __asm volatile ("dmb":::"memory");
82 // }
83 
84 // rt_inline void rt_hw_dsb(void)
85 // {
86 //     __asm volatile ("dsb":::"memory");
87 // }
88 
89 #endif  /*CPUPORT_H__*/
90