1 /*
2  * Copyright (c) 2006-2021, RT-Thread Development Team
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  *
6  * Change Logs:
7  * Date           Author       Notes
8  * 2006-09-06     XuXinming    first version
9  */
10 
11 #include <rtthread.h>
12 #include "s3c44b0.h"
13 
14 /**
15  * @addtogroup S3C44B0
16  */
17 /*@{*/
18 
19 /**
20  * This function will enable I-Cache of CPU
21  *
22  */
rt_hw_cpu_icache_enable()23 void rt_hw_cpu_icache_enable()
24 {
25     rt_base_t reg;
26 
27     volatile int i;
28     /* flush cycle */
29     for(i = 0x10002000; i < 0x10004800; i+=16)
30     {
31         *((int *)i)=0x0;
32     }
33 
34     /*
35      *  Init cache
36      *  Non-cacheable area (everything outside RAM)
37      *  0x0000:0000 - 0x0C00:0000
38      */
39     NCACHBE0 = 0xC0000000;
40     NCACHBE1 = 0x00000000;
41 
42     /*
43         Enable chache
44     */
45     reg = SYSCFG;
46     reg |= 0x00000006; /* 8kB */
47     SYSCFG = reg;
48 }
49 
50 /**
51  * This function will disable I-Cache of CPU
52  *
53  */
rt_hw_cpu_icache_disable()54 void rt_hw_cpu_icache_disable()
55 {
56     rt_base_t reg;
57 
58     reg = SYSCFG;
59     reg &= ~0x00000006; /* 8kB */
60     SYSCFG = reg;
61 }
62 
63 /**
64  * this function will get the status of I-Cache
65  *
66  */
rt_hw_cpu_icache_status()67 rt_base_t rt_hw_cpu_icache_status()
68 {
69     return 0;
70 }
71 
72 /**
73  * this function will enable D-Cache of CPU
74  *
75  */
rt_hw_cpu_dcache_enable()76 void rt_hw_cpu_dcache_enable()
77 {
78     rt_hw_cpu_icache_enable();
79 }
80 
81 /**
82  * this function will disable D-Cache of CPU
83  *
84  */
rt_hw_cpu_dcache_disable()85 void rt_hw_cpu_dcache_disable()
86 {
87     rt_hw_cpu_icache_disable();
88 }
89 
90 /**
91  * this function will get the status of D-Cache
92  *
93  */
rt_hw_cpu_dcache_status()94 rt_base_t rt_hw_cpu_dcache_status()
95 {
96     return rt_hw_cpu_icache_status();
97 }
98 
99 /*@}*/
100