1/*
2 * Copyright (c) 2006-2022, RT-Thread Development Team
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Change Logs:
7 * Date           Author       Notes
8 * 2019-12-04     Jiaxun Yang  Initial version
9 */
10
11#ifndef __ASSEMBLY__
12#define __ASSEMBLY__
13#endif
14
15#include <mips.h>
16#include <rtconfig.h>
17
18#include "asm.h"
19#include <rtconfig.h>
20
21    .section ".start", "ax"
22    .set noreorder
23
24    /* the program entry */
25    .globl  _rtthread_entry
26_rtthread_entry:
27#ifndef RT_USING_SELF_BOOT
28    .globl  _start
29_start:
30#endif
31    PTR_LA  ra, _rtthread_entry
32
33    /* disable interrupt */
34    MTC0    zero, CP0_CAUSE
35    MTC0    zero, CP0_STATUS    # Set CPU to disable interrupt.
36    ehb
37
38#ifdef ARCH_MIPS64
39    dli     t0, ST0_KX
40    MTC0    t0, CP0_STATUS
41#endif
42
43    /* setup stack pointer */
44    PTR_LA  sp, _system_stack
45    PTR_LA  gp, _gp
46
47    bal rt_cpu_early_init
48    nop
49
50    /* clear bss */
51    PTR_LA  t0, __bss_start
52    PTR_LA  t1, __bss_end
53
54_clr_bss_loop:
55    sw  zero, 0(t0)
56    bne t1, t0, _clr_bss_loop
57    addu    t0, 4
58    /* jump to RT-Thread RTOS */
59    jal rtthread_startup
60    nop
61
62    /* restart, never die */
63    j   _start
64    nop
65