1 /*
2  * Copyright (c) 2006-2021, RT-Thread Development Team
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  *
6  * Change Logs:
7  * Date           Author       Notes
8  * 2016-09-07     Urey         the first version
9  */
10 
11 #ifndef _MIPS_CFG_H_
12 #define _MIPS_CFG_H_
13 
14 #ifndef __ASSEMBLY__
15 #include <stdint.h>
16 typedef struct mips32_core_cfg
17 {
18     uint16_t icache_line_size;
19     uint16_t icache_lines_per_way;
20     uint16_t icache_ways;
21     uint16_t icache_size;
22     uint16_t dcache_line_size;
23     uint16_t dcache_lines_per_way;
24     uint16_t dcache_ways;
25     uint16_t dcache_size;
26 
27     uint16_t max_tlb_entries;   /* number of tlb entry */
28 } mips32_core_cfg_t;
29 
30 extern mips32_core_cfg_t g_mips_core;
31 
32 #endif /* __ASSEMBLY__ */
33 
34 #endif /* _MIPS_CFG_H_ */
35