1 /* 2 * Copyright (c) 2006-2021, RT-Thread Development Team 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 * 6 * Change Logs: 7 * Date Author Notes 8 * 2019-12-04 Jiaxun Yang Initial version 9 */ 10 11 #ifndef _MIPS_PTRACE_H 12 #define _MIPS_PTRACE_H 13 14 #include "asm.h" 15 #include "mips_regs.h" 16 17 #define HI_LO_SIZE 4 18 19 #define FP_REG_SIZE 8 20 #define NUM_FPU_REGS 16 21 22 #ifndef __ASSEMBLY__ 23 #include <rtthread.h> 24 25 struct mips_fpu_struct { 26 rt_uint64_t fpr[NUM_FPU_REGS]; 27 rt_uint32_t fcr31; 28 rt_uint32_t pad; 29 }; 30 31 struct pt_regs { 32 #ifndef ARCH_MIPS64 33 /* Only O32 Need This! */ 34 /* Pad bytes for argument save space on the stack. */ 35 rt_uint32_t pad0[8]; 36 37 /* Saved main processor registers. */ 38 rt_uint32_t regs[32]; 39 40 /* Saved special registers. */ 41 rt_uint32_t cp0_status; 42 rt_uint32_t hi; 43 rt_uint32_t lo; 44 rt_uint32_t cp0_badvaddr; 45 rt_uint32_t cp0_cause; 46 rt_uint32_t cp0_epc; 47 #else 48 /* Saved main processor registers. */ 49 unsigned long regs[32]; 50 51 /* Saved special registers. */ 52 rt_uint32_t cp0_status; 53 rt_uint32_t hi; 54 rt_uint32_t lo; 55 unsigned long cp0_badvaddr; 56 rt_uint32_t cp0_cause; 57 unsigned long cp0_epc; 58 #endif 59 60 #ifdef RT_USING_FPU 61 /* FPU Registers */ 62 /* Unlike Linux Kernel, we save these registers unconditionally, 63 * so it should be a part of pt_regs */ 64 struct mips_fpu_struct fpu; 65 #endif 66 } __attribute__((aligned(8))); 67 #endif 68 69 /* Note: For call stack o32 ABI has 0x8 shadowsoace Here */ 70 #ifdef ARCH_MIPS64 71 #define PT_R0 (0x0 * LONGSIZE) /* 0 */ 72 #else 73 #define PT_R0 (0x8 * LONGSIZE) /* 0 */ 74 #endif 75 #define PT_R1 ((PT_R0) + LONGSIZE) /* 1 */ 76 #define PT_R2 ((PT_R1) + LONGSIZE) /* 2 */ 77 #define PT_R3 ((PT_R2) + LONGSIZE) /* 3 */ 78 #define PT_R4 ((PT_R3) + LONGSIZE) /* 4 */ 79 #define PT_R5 ((PT_R4) + LONGSIZE) /* 5 */ 80 #define PT_R6 ((PT_R5) + LONGSIZE) /* 6 */ 81 #define PT_R7 ((PT_R6) + LONGSIZE) /* 7 */ 82 #define PT_R8 ((PT_R7) + LONGSIZE) /* 8 */ 83 #define PT_R9 ((PT_R8) + LONGSIZE) /* 9 */ 84 #define PT_R10 ((PT_R9) + LONGSIZE) /* 10 */ 85 #define PT_R11 ((PT_R10) + LONGSIZE) /* 11 */ 86 #define PT_R12 ((PT_R11) + LONGSIZE) /* 12 */ 87 #define PT_R13 ((PT_R12) + LONGSIZE) /* 13 */ 88 #define PT_R14 ((PT_R13) + LONGSIZE) /* 14 */ 89 #define PT_R15 ((PT_R14) + LONGSIZE) /* 15 */ 90 #define PT_R16 ((PT_R15) + LONGSIZE) /* 16 */ 91 #define PT_R17 ((PT_R16) + LONGSIZE) /* 17 */ 92 #define PT_R18 ((PT_R17) + LONGSIZE) /* 18 */ 93 #define PT_R19 ((PT_R18) + LONGSIZE) /* 19 */ 94 #define PT_R20 ((PT_R19) + LONGSIZE) /* 20 */ 95 #define PT_R21 ((PT_R20) + LONGSIZE) /* 21 */ 96 #define PT_R22 ((PT_R21) + LONGSIZE) /* 22 */ 97 #define PT_R23 ((PT_R22) + LONGSIZE) /* 23 */ 98 #define PT_R24 ((PT_R23) + LONGSIZE) /* 24 */ 99 #define PT_R25 ((PT_R24) + LONGSIZE) /* 25 */ 100 #define PT_R26 ((PT_R25) + LONGSIZE) /* 26 */ 101 #define PT_R27 ((PT_R26) + LONGSIZE) /* 27 */ 102 #define PT_R28 ((PT_R27) + LONGSIZE) /* 28 */ 103 #define PT_R29 ((PT_R28) + LONGSIZE) /* 29 */ 104 #define PT_R30 ((PT_R29) + LONGSIZE) /* 30 */ 105 #define PT_R31 ((PT_R30) + LONGSIZE) /* 31 */ 106 107 /* 108 * Saved special registers 109 */ 110 #define PT_STATUS ((PT_R31) + LONGSIZE) /* 32 */ 111 #define PT_HI ((PT_STATUS) + HI_LO_SIZE) /* 33 */ 112 #define PT_LO ((PT_HI) + HI_LO_SIZE) /* 34 */ 113 #define PT_BADVADDR ((PT_LO) + LONGSIZE) /* 35 */ 114 #define PT_CAUSE ((PT_BADVADDR) + LONGSIZE) /* 36 */ 115 #define PT_EPC ((PT_CAUSE) + LONGSIZE) /* 37 */ 116 117 #define PT_REG_END ((PT_EPC) + LONGSIZE) /* Align already ensured manually */ 118 119 #ifdef RT_USING_FPU 120 #define PT_FPU_R0 (PT_REG_END) 121 #define PT_FPU_R2 ((PT_FPU_R0) + FP_REG_SIZE) 122 #define PT_FPU_R4 ((PT_FPU_R2) + FP_REG_SIZE) 123 #define PT_FPU_R6 ((PT_FPU_R4) + FP_REG_SIZE) 124 #define PT_FPU_R8 ((PT_FPU_R6) + FP_REG_SIZE) 125 #define PT_FPU_R10 ((PT_FPU_R8) + FP_REG_SIZE) 126 #define PT_FPU_R12 ((PT_FPU_R10) + FP_REG_SIZE) 127 #define PT_FPU_R14 ((PT_FPU_R12) + FP_REG_SIZE) 128 #define PT_FPU_R16 ((PT_FPU_R14) + FP_REG_SIZE) 129 #define PT_FPU_R18 ((PT_FPU_R16) + FP_REG_SIZE) 130 #define PT_FPU_R20 ((PT_FPU_R18) + FP_REG_SIZE) 131 #define PT_FPU_R22 ((PT_FPU_R20) + FP_REG_SIZE) 132 #define PT_FPU_R24 ((PT_FPU_R22) + FP_REG_SIZE) 133 #define PT_FPU_R26 ((PT_FPU_R24) + FP_REG_SIZE) 134 #define PT_FPU_R28 ((PT_FPU_R26) + FP_REG_SIZE) 135 #define PT_FPU_R30 ((PT_FPU_R28) + FP_REG_SIZE) 136 #define PT_FPU_FCSR31 ((PT_FPU_R30) + FP_REG_SIZE) 137 #define PT_FPU_PAD0 ((PT_FPU_FCSR31) + 4) 138 139 #define PT_FPU_END ((PT_FPU_PAD0) + 4) 140 #define PT_SIZE PT_FPU_END 141 #else 142 #define PT_SIZE PT_REG_END 143 #endif 144 145 #endif 146