1 /* 2 * Copyright (c) 2006-2021, RT-Thread Development Team 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 * 6 * Change Logs: 7 * Date Author Notes 8 * 2011-08-08 lgnq first version 9 */ 10 11 #ifndef __LS1B_H__ 12 #define __LS1B_H__ 13 14 #include <gs232.h> 15 16 #define LS1B_ACPI_IRQ 0 17 #define LS1B_HPET_IRQ 1 18 #define LS1B_UART0_IRQ 2 19 #define LS1B_UART1_IRQ 3 20 #define LS1B_UART2_IRQ 4 21 #define LS1B_UART3_IRQ 5 22 #define LS1B_UART4_IRQ 29 23 #define LS1B_UART5_IRQ 30 24 #define LS1B_UART6_IRQ 2 //共享LS1B_UART0_IRQ 25 #define LS1B_UART7_IRQ 2 26 #define LS1B_UART8_IRQ 2 27 #define LS1B_UART9_IRQ 3 //共享LS1B_UART1_IRQ 28 #define LS1B_UART10_IRQ 3 29 #define LS1B_UART11_IRQ 3 30 31 #define LS1B_CAN0_IRQ 6 32 #define LS1B_CAN1_IRQ 7 33 #define LS1B_SPI0_IRQ 8 34 #define LS1B_SPI1_IRQ 9 35 #define LS1B_AC97_IRQ 10 36 #define LS1B_MS_IRQ 11 37 #define LS1B_KB_IRQ 12 38 #define LS1B_DMA0_IRQ 13 39 #define LS1B_DMA1_IRQ 14 40 #define LS1B_NAND_IRQ 15 41 #define LS1B_I2C0_IRQ 16 42 #define LS1B_I2C1_IRQ 17 43 #define LS1B_PWM0_IRQ 18 44 #define LS1B_PWM1_IRQ 19 45 #define LS1B_PWM2_IRQ 20 46 #define LS1B_PWM3_IRQ 21 47 #define LS1B_LPC_IRQ 22 48 #define LS1B_EHCI_IRQ 32 49 #define LS1B_OHCI_IRQ 33 50 #define LS1B_GMAC1_IRQ 34 51 #define LS1B_GMAC2_IRQ 35 52 #define LS1B_SATA_IRQ 36 53 #define LS1B_GPU_IRQ 37 54 #define LS1B_PCI_INTA_IRQ 38 55 #define LS1B_PCI_INTB_IRQ 39 56 #define LS1B_PCI_INTC_IRQ 40 57 #define LS1B_PCI_INTD_IRQ 41 58 59 #define LS1B_GPIO_IRQ 64 60 #define LS1B_GPIO_FIRST_IRQ 64 61 #define LS1B_GPIO_IRQ_COUNT 64 62 #define LS1B_GPIO_LAST_IRQ (LS1B_GPIO_FIRST_IRQ + LS1B_GPIO_IRQ_COUNT-1) 63 64 #define INT_PCI_INTA (1<<6) 65 #define INT_PCI_INTB (1<<7) 66 #define INT_PCI_INTC (1<<8) 67 #define INT_PCI_INTD (1<<9) 68 69 #define LS1B_LAST_IRQ 159 70 #define MIPS_CPU_TIMER_IRQ 167 71 #define LS1B_INTREG_BASE 0xbfd01040 72 73 #define LS1B_DMA_IRQ_BASE 168 74 #define LS1B_DMA_IRQ_COUNT 16 75 76 #endif 77