1 #ifndef __IO_H__
2 #define __IO_H__
3
4 #define __iomem
5
6 /*
7 * 8, 16 and 32 bit, big and little endian I/O operations, with barrier.
8 *
9 * Read operations have additional twi & isync to make sure the read
10 * is actually performed (i.e. the data has come back) before we start
11 * executing any following instructions.
12 */
in_8(const volatile unsigned char __iomem * addr)13 static inline int in_8(const volatile unsigned char __iomem *addr)
14 {
15 int ret;
16
17 __asm__ __volatile__(
18 "sync; lbz%U1%X1 %0,%1;\n"
19 "twi 0,%0,0;\n"
20 "isync" : "=r" (ret) : "m" (*addr));
21 return ret;
22 }
23
out_8(volatile unsigned char __iomem * addr,int val)24 static inline void out_8(volatile unsigned char __iomem *addr, int val)
25 {
26 __asm__ __volatile__("stb%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val));
27 }
28
in_le16(const volatile unsigned short __iomem * addr)29 extern inline int in_le16(const volatile unsigned short __iomem *addr)
30 {
31 int ret;
32
33 __asm__ __volatile__("sync; lhbrx %0,0,%1;\n"
34 "twi 0,%0,0;\n"
35 "isync" : "=r" (ret) :
36 "r" (addr), "m" (*addr));
37 return ret;
38 }
39
in_be16(const volatile unsigned short __iomem * addr)40 extern inline int in_be16(const volatile unsigned short __iomem *addr)
41 {
42 int ret;
43
44 __asm__ __volatile__("sync; lhz%U1%X1 %0,%1;\n"
45 "twi 0,%0,0;\n"
46 "isync" : "=r" (ret) : "m" (*addr));
47 return ret;
48 }
49
out_le16(volatile unsigned short __iomem * addr,int val)50 extern inline void out_le16(volatile unsigned short __iomem *addr, int val)
51 {
52 __asm__ __volatile__("sync; sthbrx %1,0,%2" : "=m" (*addr) :
53 "r" (val), "r" (addr));
54 }
55
out_be16(volatile unsigned short __iomem * addr,int val)56 extern inline void out_be16(volatile unsigned short __iomem *addr, int val)
57 {
58 __asm__ __volatile__("sync; sth%U0%X0 %1,%0" : "=m" (*addr) : "r" (val));
59 }
60
in_le32(const volatile unsigned __iomem * addr)61 extern inline unsigned in_le32(const volatile unsigned __iomem *addr)
62 {
63 unsigned ret;
64
65 __asm__ __volatile__("sync; lwbrx %0,0,%1;\n"
66 "twi 0,%0,0;\n"
67 "isync" : "=r" (ret) :
68 "r" (addr), "m" (*addr));
69 return ret;
70 }
71
in_be32(const volatile unsigned __iomem * addr)72 extern inline unsigned in_be32(const volatile unsigned __iomem *addr)
73 {
74 unsigned ret;
75
76 __asm__ __volatile__("sync; lwz%U1%X1 %0,%1;\n"
77 "twi 0,%0,0;\n"
78 "isync" : "=r" (ret) : "m" (*addr));
79 return ret;
80 }
81
out_le32(volatile unsigned __iomem * addr,int val)82 extern inline void out_le32(volatile unsigned __iomem *addr, int val)
83 {
84 __asm__ __volatile__("sync; stwbrx %1,0,%2" : "=m" (*addr) :
85 "r" (val), "r" (addr));
86 }
87
out_be32(volatile unsigned __iomem * addr,int val)88 extern inline void out_be32(volatile unsigned __iomem *addr, int val)
89 {
90 __asm__ __volatile__("sync; stw%U0%X0 %1,%0" : "=m" (*addr) : "r" (val));
91 }
92
93 #endif
94