1 #include <rthw.h>
2 #include <rtthread.h>
3 #include "riscv-ops.h"
4 #include "rt_hw_stack_frame.h"
5
6 #define ISR_NUMBER 32
7 static volatile rt_hw_stack_frame_t *s_stack_frame;
8 static struct rt_irq_desc rv32irq_table[ISR_NUMBER];
9 void rt_show_stack_frame(void);
10
11 /**
12 * Temporary interrupt entry function
13 *
14 * @param mcause Machine Cause Register
15 * @return RT_NULL
16 */
rt_hw_interrupt_handle(rt_uint32_t mcause)17 rt_weak rt_isr_handler_t rt_hw_interrupt_handle(rt_uint32_t mcause)
18 {
19 rt_kprintf("UN-handled interrupt %d occurred!!!\n", mcause);
20 return RT_NULL;
21 }
22
23 /**
24 * Interrupt entry function initialization
25 */
rt_hw_interrupt_init(void)26 rt_weak void rt_hw_interrupt_init(void)
27 {
28 int idx = 0;
29
30 for (idx = 0; idx < ISR_NUMBER; idx++)
31 {
32 rv32irq_table[idx].handler = (rt_isr_handler_t)rt_hw_interrupt_handle;
33 rv32irq_table[idx].param = RT_NULL;
34 }
35 }
36
37 /**
38 * Break Entry Function Binding
39 *
40 * @param vector interrupt number
41 * @param handler Break-in function requiring binding
42 * @param param NULL
43 * @param name NULL
44 * @return old handler
45 */
rt_hw_interrupt_install(int vector,rt_isr_handler_t handler,void * param,const char * name)46 rt_weak rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
47 void *param, const char *name)
48 {
49 rt_isr_handler_t old_handler = RT_NULL;
50
51 if(vector < ISR_NUMBER)
52 {
53 old_handler = rv32irq_table[vector].handler;
54 if (handler != RT_NULL)
55 {
56 rv32irq_table[vector].handler = (rt_isr_handler_t)handler;
57 rv32irq_table[vector].param = param;
58 }
59 }
60
61 return old_handler;
62 }
63
64 /**
65 * Query and Distribution Entry for Exception and Interrupt Sources
66 *
67 * @param mcause Machine Cause Register
68 */
rt_rv32_system_irq_handler(rt_uint32_t mcause)69 rt_weak void rt_rv32_system_irq_handler(rt_uint32_t mcause)
70 {
71 rt_uint32_t mscratch = read_csr(0x340);
72 rt_uint32_t irq_id = (mcause & 0x1F);
73 rt_uint32_t exception = !(mcause & 0x80000000);
74 if(exception)
75 {
76 s_stack_frame = (volatile rt_hw_stack_frame_t *)(uintptr_t)mscratch;
77 rt_show_stack_frame();
78 }
79 else
80 {
81 rv32irq_table[irq_id].handler(irq_id, rv32irq_table[irq_id].param);
82 }
83 }
84
85 /**
86 * Register Print on Exception
87 */
rt_show_stack_frame(void)88 rt_weak void rt_show_stack_frame(void)
89 {
90 rt_kprintf("Stack frame:\r\n----------------------------------------\r\n");
91 rt_kprintf("ra : 0x%08x\r\n", s_stack_frame->ra);
92 rt_kprintf("mstatus : 0x%08x\r\n", read_csr(0x300));//mstatus
93 rt_kprintf("t0 : 0x%08x\r\n", s_stack_frame->t0);
94 rt_kprintf("t1 : 0x%08x\r\n", s_stack_frame->t1);
95 rt_kprintf("t2 : 0x%08x\r\n", s_stack_frame->t2);
96 rt_kprintf("a0 : 0x%08x\r\n", s_stack_frame->a0);
97 rt_kprintf("a1 : 0x%08x\r\n", s_stack_frame->a1);
98 rt_kprintf("a2 : 0x%08x\r\n", s_stack_frame->a2);
99 rt_kprintf("a3 : 0x%08x\r\n", s_stack_frame->a3);
100 rt_kprintf("a4 : 0x%08x\r\n", s_stack_frame->a4);
101 rt_kprintf("a5 : 0x%08x\r\n", s_stack_frame->a5);
102 #ifndef __riscv_32e
103 rt_kprintf("a6 : 0x%08x\r\n", s_stack_frame->a6);
104 rt_kprintf("a7 : 0x%08x\r\n", s_stack_frame->a7);
105 rt_kprintf("t3 : 0x%08x\r\n", s_stack_frame->t3);
106 rt_kprintf("t4 : 0x%08x\r\n", s_stack_frame->t4);
107 rt_kprintf("t5 : 0x%08x\r\n", s_stack_frame->t5);
108 rt_kprintf("t6 : 0x%08x\r\n", s_stack_frame->t6);
109 #endif
110 }
111