1/*
2 * Copyright (c) 2006-2018, RT-Thread Development Team
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Change Logs:
7 * Date           Author       Notes
8 * 2018/10/01     Bernard      The first version
9 * 2018/12/27     Jesven       Add SMP support
10 * 2020/6/12      Xim          Port to QEMU and remove SMP support
11 * 2024-06-30     Shell        Support of kernel remapping
12 */
13
14#include <encoding.h>
15#include <cpuport.h>
16
17    .data
18    .global boot_hartid    /* global varible rt_boot_hartid in .data section */
19boot_hartid:
20    .word 0xdeadbeef
21
22    .global         _start
23    .section ".start", "ax"
24_start:
25    j 1f
26    .word 0xdeadbeef
27    .align 3
28    .global g_wake_up
29    g_wake_up:
30        .dword 1
31        .dword 0
321:
33    /* save hartid */
34    la t0, boot_hartid                /* global varible rt_boot_hartid */
35    mv t1, a0                         /* get hartid in S-mode frome a0 register */
36    sw t1, (t0)                       /* store t1 register low 4 bits in memory address which is stored in t0 */
37
38    /* clear Interrupt Registers */
39    csrw sie, 0
40    csrw sip, 0
41    /* set Trap Vector Base Address Register */
42    la t0, trap_entry
43    csrw stvec, t0
44
45    li x1, 0
46    li x2, 0
47    li x3, 0
48    li x4, 0
49    li x5, 0
50    li x6, 0
51    li x7, 0
52    li x8, 0
53    li x9, 0
54    li x10,0
55    li x11,0
56    li x12,0
57    li x13,0
58    li x14,0
59    li x15,0
60    li x16,0
61    li x17,0
62    li x18,0
63    li x19,0
64    li x20,0
65    li x21,0
66    li x22,0
67    li x23,0
68    li x24,0
69    li x25,0
70    li x26,0
71    li x27,0
72    li x28,0
73    li x29,0
74    li x30,0
75    li x31,0
76
77    /* set to disable FPU */
78    li t0, SSTATUS_FS + SSTATUS_VS
79    csrc sstatus, t0
80    li t0, SSTATUS_SUM
81    csrs sstatus, t0
82
83.option push
84.option norelax
85    la gp, __global_pointer$
86.option pop
87
88    /* removed SMP support here */
89    la   sp, __stack_start__
90    li   t0, __STACKSIZE__
91    add  sp, sp, t0
92
93    /**
94     * sscratch is always zero on kernel mode
95     */
96    csrw sscratch, zero
97    call init_bss
98#ifdef ARCH_MM_MMU
99    call    rt_hw_mem_setup_early
100    call    rt_kmem_pvoff
101    /* a0 := pvoff  */
102    beq     a0, zero, 1f
103
104    /* relocate pc */
105    la      x1, _after_pc_relocation
106    sub     x1, x1, a0
107    ret
108_after_pc_relocation:
109    /* relocate gp */
110    sub     gp, gp, a0
111
112    /* relocate context: sp */
113    la      sp, __stack_start__
114    li      t0, __STACKSIZE__
115    add     sp, sp, t0
116
117    /* reset s0-fp */
118    mv      s0, zero
119
120    /* relocate stvec */
121    la      t0, trap_entry
122    csrw    stvec, t0
1231:
124#endif
125    call    sbi_init
126    call    primary_cpu_entry
127
128_never_return_here:
129    j       .
130
131.global _start_link_addr
132_start_link_addr:
133    .dword __text_start
134