1 /*
2 * Copyright (c) 2006-2022, RT-Thread Development Team
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Change Logs:
7 * Date Author Notes
8 * 2018-09-01 xuzhuoyi the first version.
9 * 2019-07-03 zhaoxiaowei add support for __rt_ffs.
10 * 2019-12-05 xiaolifan add support for hardware fpu32
11 * 2022-10-17 guyunjie add support for hardware fpu64 and vcrc
12 */
13
14 #include <rthw.h>
15
16 #define DBG_TAG "cpu.ti.c28x"
17 #define DBG_LVL DBG_INFO
18 #include <rtdbg.h>
19
20 extern volatile rt_atomic_t rt_interrupt_nest;
21
22 /* exception and interrupt handler table */
23 rt_uint32_t rt_interrupt_from_thread;
24 rt_uint32_t rt_interrupt_to_thread;
25 rt_uint32_t rt_thread_switch_interrupt_flag;
26 /* exception hook */
27 static rt_err_t (*rt_exception_hook)(void *context) = RT_NULL;
28
29 extern rt_uint16_t rt_hw_get_st0(void);
30 extern rt_uint16_t rt_hw_get_st1(void);
31 extern int rt_hw_calc_csb(int value);
32
33
34 struct exception_stack_frame
35 {
36 rt_uint32_t t_st0;
37 rt_uint32_t acc;
38 rt_uint32_t p;
39 rt_uint32_t ar1_ar0;
40 rt_uint32_t dp_st1;
41 rt_uint32_t dbgstat_ier;
42 rt_uint32_t return_address;
43 };
44
45 struct stack_frame
46 {
47 struct exception_stack_frame exception_stack_frame;
48
49 /* r4 ~ r11 register */
50 rt_uint16_t ar0h;
51 rt_uint16_t ar1h;
52 rt_uint32_t xar2;
53 rt_uint32_t xar3;
54 rt_uint32_t xar4;
55 rt_uint32_t xar5;
56 rt_uint32_t xar6;
57 rt_uint32_t xar7;
58 rt_uint32_t xt;
59 rt_uint32_t rpc;
60
61 #ifdef __TMS320C28XX_FPU32__
62 rt_uint32_t rb;
63 rt_uint32_t stf;
64 rt_uint32_t r0h;
65 rt_uint32_t r1h;
66 rt_uint32_t r2h;
67 rt_uint32_t r3h;
68 rt_uint32_t r4h;
69 rt_uint32_t r5h;
70 rt_uint32_t r6h;
71 rt_uint32_t r7h;
72 #endif
73
74 #ifdef __TMS320C28XX_FPU64__
75 rt_uint32_t r0l;
76 rt_uint32_t r1l;
77 rt_uint32_t r2l;
78 rt_uint32_t r3l;
79 rt_uint32_t r4l;
80 rt_uint32_t r5l;
81 rt_uint32_t r6l;
82 rt_uint32_t r7l;
83 #endif
84
85 #ifdef __TMS320C28XX_VCRC__
86 rt_uint32_t vcrc;
87 rt_uint32_t vstatus;
88 rt_uint32_t vcrcpoly;
89 rt_uint32_t vcrcsize;
90 #endif
91
92 };
93
rt_hw_stack_init(void * tentry,void * parameter,rt_uint8_t * stack_addr,void * texit)94 rt_uint8_t *rt_hw_stack_init(void *tentry,
95 void *parameter,
96 rt_uint8_t *stack_addr,
97 void *texit)
98 {
99 struct stack_frame *stack_frame;
100 rt_uint8_t *stk;
101 unsigned long i;
102
103 stk = stack_addr;
104 stk = (rt_uint8_t *)RT_ALIGN((rt_uint32_t)stk, 2);
105 stk += 1; /*to work around the stack alignment*/
106
107 stack_frame = (struct stack_frame *)stk;
108
109 /* zero all registers */
110 for (i = 0; i < sizeof(struct stack_frame) / sizeof(rt_uint32_t); i ++)
111 {
112 ((rt_uint32_t *)stack_frame)[i] = 0;
113 }
114
115 /* configure special registers*/
116 stack_frame->exception_stack_frame.dp_st1 = 0x00000A08;
117 stack_frame->xar4 = (rt_uint32_t)parameter;
118 stack_frame->exception_stack_frame.return_address = (rt_uint32_t)tentry;
119 stack_frame->rpc = (rt_uint32_t)texit;
120
121 #ifdef __TMS320C28XX_FPU32__
122 stack_frame->stf = 0x00000200;
123 stack_frame->rb = 0;
124 #endif
125
126 /* return task's current stack address */
127 return stk + sizeof(struct stack_frame);
128 }
129
130 /**
131 * This function set the hook, which is invoked on fault exception handling.
132 *
133 * @param exception_handle the exception handling hook function.
134 */
rt_hw_exception_install(rt_err_t (* exception_handle)(void * context))135 void rt_hw_exception_install(rt_err_t (*exception_handle)(void *context))
136 {
137 rt_exception_hook = exception_handle;
138 }
139
140
141 struct exception_info
142 {
143 rt_uint32_t exc_return;
144 struct stack_frame stack_frame;
145 };
146
147 #ifdef RT_USING_CPU_FFS
148 /*
149 * This function called rt_hw_calc_csb to finds the first bit set in value.
150 * rt_hw_calc_csb is a native assembly program that use "CSB" instruction in C28x.
151 * When you use this function, remember that "int" is only 16-bit in C28x's C compiler.
152 * If value is a number bigger that 0xFFFF, trouble may be caused.
153 * Maybe change "int __rt_ffs(int value)" to "rt_int32_t __rt_ffs(rt_int32_t value)" will be better.
154 */
__rt_ffs(int value)155 int __rt_ffs(int value)
156 {
157 return rt_hw_calc_csb(value);
158 }
159 #endif
160
rt_interrupt_enter(void)161 void rt_interrupt_enter(void)
162 {
163 rt_base_t level;
164
165 __asm(" EINT");
166 level = rt_hw_interrupt_disable();
167 rt_interrupt_nest ++;
168 RT_OBJECT_HOOK_CALL(rt_interrupt_enter_hook,());
169 rt_hw_interrupt_enable(level);
170
171 LOG_D("irq has come..., irq current nest:%d",
172 (rt_int32_t)rt_interrupt_nest);
173 }
174
rt_interrupt_leave(void)175 void rt_interrupt_leave(void)
176 {
177 LOG_D("irq is going to leave, irq current nest:%d",
178 (rt_int32_t)rt_interrupt_nest);
179
180 rt_hw_interrupt_disable();
181 RT_OBJECT_HOOK_CALL(rt_interrupt_leave_hook,());
182 rt_interrupt_nest --;
183 if(rt_thread_switch_interrupt_flag && !rt_interrupt_nest)
184 {
185 __asm(" OR IFR, #0x8000"); /* trigger rtos int */
186 }
187 /* rt_hw_interrupt_enable auto done by hardware on IRET */
188 }
189