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readme.rst
1########################### 2Musca-B1 Platform Specifics 3########################### 4 5**************** 6DAPLink Firmware 7**************** 8The code on Musca-B1 is running from embedded flash. Make sure that the DAPLink 9FW for eFlash is downloaded to the board. You can find on the 10`Arm Developer page <https://developer.arm.com/documentation/110409/0100/Musca-B1-firmware-update-and-boot-recovery>`__ 11A short description of how to update the DAPLink FW can be found there as well. 12 13.. Note:: 14 Warm reset of eFlash is not supported on Musca_B1. TF-M may not boot after 15 a warm reset. Further information on the hardware limitation can be 16 found on `Arm Developer page <https://developer.arm.com/documentation/110409/0100/Musca-B1-warm-reset-of-eFlash>`__. 17 18******************** 19Platform pin service 20******************** 21 22This service is designed to perform secure pin services of the platform 23(e.g alternate function setting, pin mode setting, etc). 24The service uses the IOCTL API of TF-M's Platform Service, which allows the 25non-secure application to make pin service requests on Musca B1 based on a 26generic service request delivery mechanism. 27 28******************** 29Musca B1 Default CPU 30******************** 31 32Musca B1 is a dual core platform (being based on the `SSE-200 subsystem <https://developer.arm.com/documentation/101104/0200/introduction/about-the-sse-200>`__), 33boot ROM code uses CPU0 running on 40.96MHz, while TF-M switches to CPU1 running on 163.84MHz. 34An additional benefit to switching the default core is that CPU1 can access SRAM3 35as Tightly Coupled Memory (TCM), while CPU0 can't. 36When the core switch happens, CPU0 sleeps in a WFI loop to save power. 37 38More information can be found in the following `patchset <https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/39616>`__. 39 40-------------- 41 42*Copyright (c) 2017-2025, Arm Limited. All rights reserved.* 43