1 /* 2 * Copyright (c) 2018-2020 Arm Limited 3 * Copyright 2019-2023 NXP. All rights reserved. 4 * 5 * Licensed under the Apache License, Version 2.0 (the "License"); 6 * you may not use this file except in compliance with the License. 7 * You may obtain a copy of the License at 8 * 9 * http://www.apache.org/licenses/LICENSE-2.0 10 * 11 * Unless required by applicable law or agreed to in writing, software 12 * distributed under the License is distributed on an "AS IS" BASIS, 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14 * See the License for the specific language governing permissions and 15 * limitations under the License. 16 */ 17 18 #ifndef __TARGET_CFG_COMMON_H__ 19 #define __TARGET_CFG_COMMON_H__ 20 21 #include "uart_stdout.h" 22 #include "tfm_peripherals_def.h" 23 #include "fsl_usart.h" 24 25 #ifdef __cplusplus 26 extern "C" { 27 #endif 28 29 #ifndef TARGET_DEBUG_LOG 30 #define TARGET_DEBUG_LOG 0 31 #endif 32 33 /** 34 * \brief Store the addresses of memory regions 35 */ 36 struct memory_region_limits { 37 uint32_t non_secure_code_start; 38 uint32_t non_secure_partition_base; 39 uint32_t non_secure_partition_limit; 40 uint32_t veneer_base; 41 uint32_t veneer_limit; 42 #ifdef BL2 43 uint32_t secondary_partition_base; 44 uint32_t secondary_partition_limit; 45 #endif /* BL2 */ 46 }; 47 48 /** 49 * \brief Configures the Memory Protection Controller. 50 * 51 * \return Returns error code. 52 */ 53 int32_t mpc_init_cfg(void); 54 55 /** 56 * \brief Configures the Peripheral Protection Controller. 57 * 58 * \return Returns error code. 59 */ 60 int32_t ppc_init_cfg(void); 61 62 /** 63 * \brief Restict access to peripheral to secure 64 */ 65 void ppc_configure_to_secure(struct platform_data_t *platform_data, bool privileged); 66 67 /** 68 * \brief Configures SAU and IDAU. 69 */ 70 void sau_and_idau_cfg(void); 71 72 /** 73 * \brief Enables the fault handlers and sets priorities. 74 * 75 * \return Returns values as specified by the \ref tfm_plat_err_t 76 */ 77 enum tfm_plat_err_t enable_fault_handlers(void); 78 79 /** 80 * \brief Configures the system reset request properties 81 * 82 * \return Returns values as specified by the \ref tfm_plat_err_t 83 */ 84 enum tfm_plat_err_t system_reset_cfg(void); 85 86 /** 87 * \brief Configures the system debug properties. 88 * 89 * \return Returns values as specified by the \ref tfm_plat_err_t 90 */ 91 enum tfm_plat_err_t init_debug(void); 92 93 /** 94 * \brief Configures all external interrupts to target the 95 * NS state, apart for the ones associated to secure 96 * peripherals (plus MPC and PPC) 97 * 98 * \return Returns values as specified by the \ref tfm_plat_err_t 99 */ 100 enum tfm_plat_err_t nvic_interrupt_target_state_cfg(void); 101 102 /** 103 * \brief This function enable the interrupts associated 104 * to the secure peripherals (plus the isolation boundary violation 105 * interrupts) 106 * 107 * \return Returns values as specified by the \ref tfm_plat_err_t 108 */ 109 enum tfm_plat_err_t nvic_interrupt_enable(void); 110 111 #ifdef __cplusplus 112 } 113 #endif 114 115 #endif /* __TARGET_CFG_COMMON_H__ */ 116