Lines Matching refs:dev_index
695 static unsigned long exynos4_get_uart_clk(int dev_index) in exynos4_get_uart_clk() argument
713 sel = (sel >> (dev_index << 2)) & 0xf; in exynos4_get_uart_clk()
734 ratio = (ratio >> (dev_index << 2)) & 0xf; in exynos4_get_uart_clk()
742 static unsigned long exynos4x12_get_uart_clk(int dev_index) in exynos4x12_get_uart_clk() argument
759 sel = (sel >> (dev_index << 2)) & 0xf; in exynos4x12_get_uart_clk()
779 ratio = (ratio >> (dev_index << 2)) & 0xf; in exynos4x12_get_uart_clk()
786 static unsigned long exynos4_get_mmc_clk(int dev_index) in exynos4_get_mmc_clk() argument
795 sel = (sel >> (dev_index << 2)) & 0xf; in exynos4_get_mmc_clk()
806 switch (dev_index) { in exynos4_get_mmc_clk()
825 if (dev_index == 1 || dev_index == 3) in exynos4_get_mmc_clk()
836 static void exynos4_set_mmc_clk(int dev_index, unsigned int div) in exynos4_set_mmc_clk() argument
850 if (dev_index < 2) { in exynos4_set_mmc_clk()
852 clear_bit = MASK_PRE_RATIO(dev_index); in exynos4_set_mmc_clk()
853 set_bit = SET_PRE_RATIO(dev_index, div); in exynos4_set_mmc_clk()
854 } else if (dev_index == 4) { in exynos4_set_mmc_clk()
856 dev_index -= 4; in exynos4_set_mmc_clk()
858 clear_bit = MASK_RATIO(dev_index); in exynos4_set_mmc_clk()
859 set_bit = SET_RATIO(dev_index, div); in exynos4_set_mmc_clk()
862 dev_index -= 2; in exynos4_set_mmc_clk()
863 clear_bit = MASK_PRE_RATIO(dev_index); in exynos4_set_mmc_clk()
864 set_bit = SET_PRE_RATIO(dev_index, div); in exynos4_set_mmc_clk()
871 static void exynos5_set_mmc_clk(int dev_index, unsigned int div) in exynos5_set_mmc_clk() argument
883 if (dev_index < 2) { in exynos5_set_mmc_clk()
887 dev_index -= 2; in exynos5_set_mmc_clk()
890 clrsetbits_le32(addr, 0xff << ((dev_index << 4) + 8), in exynos5_set_mmc_clk()
891 (div & 0xff) << ((dev_index << 4) + 8)); in exynos5_set_mmc_clk()
895 static void exynos5420_set_mmc_clk(int dev_index, unsigned int div) in exynos5420_set_mmc_clk() argument
909 shift = dev_index * 10; in exynos5420_set_mmc_clk()
1642 unsigned long get_uart_clk(int dev_index) in get_uart_clk() argument
1646 switch (dev_index) { in get_uart_clk()
1660 debug("%s: invalid UART index %d", __func__, dev_index); in get_uart_clk()
1668 return exynos4x12_get_uart_clk(dev_index); in get_uart_clk()
1669 return exynos4_get_uart_clk(dev_index); in get_uart_clk()
1675 unsigned long get_mmc_clk(int dev_index) in get_mmc_clk() argument
1680 return exynos4_get_mmc_clk(dev_index); in get_mmc_clk()
1682 switch (dev_index) { in get_mmc_clk()
1696 debug("%s: invalid MMC index %d", __func__, dev_index); in get_mmc_clk()
1703 void set_mmc_clk(int dev_index, unsigned int div) in set_mmc_clk() argument
1711 exynos5420_set_mmc_clk(dev_index, div); in set_mmc_clk()
1713 exynos5_set_mmc_clk(dev_index, div); in set_mmc_clk()
1715 exynos4_set_mmc_clk(dev_index, div); in set_mmc_clk()