Lines Matching refs:mbar_writeByte
190 mbar_writeByte(MCFSIM_MPARK, 0x40); /* 5249 Internal Core takes priority over DMA */ in cpu_init_f()
191 mbar_writeByte(MCFSIM_SYPCR, 0x00); in cpu_init_f()
192 mbar_writeByte(MCFSIM_SWIVR, 0x0f); in cpu_init_f()
193 mbar_writeByte(MCFSIM_SWSR, 0x00); in cpu_init_f()
194 mbar_writeByte(MCFSIM_SWDICR, 0x00); in cpu_init_f()
195 mbar_writeByte(MCFSIM_TIMER1ICR, 0x00); in cpu_init_f()
196 mbar_writeByte(MCFSIM_TIMER2ICR, 0x88); in cpu_init_f()
197 mbar_writeByte(MCFSIM_I2CICR, 0x00); in cpu_init_f()
198 mbar_writeByte(MCFSIM_UART1ICR, 0x00); in cpu_init_f()
199 mbar_writeByte(MCFSIM_UART2ICR, 0x00); in cpu_init_f()
200 mbar_writeByte(MCFSIM_ICR6, 0x00); in cpu_init_f()
201 mbar_writeByte(MCFSIM_ICR7, 0x00); in cpu_init_f()
202 mbar_writeByte(MCFSIM_ICR8, 0x00); in cpu_init_f()
203 mbar_writeByte(MCFSIM_ICR9, 0x00); in cpu_init_f()
204 mbar_writeByte(MCFSIM_QSPIICR, 0x00); in cpu_init_f()
312 mbar_writeByte(MCF_GPIO_PAR_FECI2C, in fecpin_setclear()
694 mbar_writeByte(MCFSIM_MPARK, 0x30); /* 5249 Internal Core takes priority over DMA */ in cpu_init_f()
695 mbar_writeByte(MCFSIM_SYPCR, 0x00); in cpu_init_f()
696 mbar_writeByte(MCFSIM_SWIVR, 0x0f); in cpu_init_f()
697 mbar_writeByte(MCFSIM_SWSR, 0x00); in cpu_init_f()
699 mbar_writeByte(MCFSIM_SWDICR, 0x00); in cpu_init_f()
700 mbar_writeByte(MCFSIM_TIMER1ICR, 0x00); in cpu_init_f()
701 mbar_writeByte(MCFSIM_TIMER2ICR, 0x88); in cpu_init_f()
702 mbar_writeByte(MCFSIM_I2CICR, 0x00); in cpu_init_f()
703 mbar_writeByte(MCFSIM_UART1ICR, 0x00); in cpu_init_f()
704 mbar_writeByte(MCFSIM_UART2ICR, 0x00); in cpu_init_f()
705 mbar_writeByte(MCFSIM_ICR6, 0x00); in cpu_init_f()
706 mbar_writeByte(MCFSIM_ICR7, 0x00); in cpu_init_f()
707 mbar_writeByte(MCFSIM_ICR8, 0x00); in cpu_init_f()
708 mbar_writeByte(MCFSIM_ICR9, 0x00); in cpu_init_f()
709 mbar_writeByte(MCFSIM_QSPIICR, 0x00); in cpu_init_f()