Lines Matching refs:which
300 The physical base address at which to map the MIPS Coherence Manager
302 the GCRs occupy a region of the physical address space which is
310 This is the base address for a memory block, which is used for
312 block which is used for loading and filling cache lines when
333 (EJTAG, SPL payload) or for machines which don't need cache initialization
334 or which want to provide their own cache implementation.
345 this can be useful on machines which don't need cache initialization or
346 which want to provide their own cache implementation.
513 Normally the initial stack frame is set up in DRAM which is often
602 Value which is inserted as boot config word 0.
609 Value which is inserted as boot config word 1.