Lines Matching refs:sel
1310 #define ___read_32bit_c0_register(source, sel, vol) \ argument
1312 if (sel == 0) \
1320 "mfc0\t%0, " #source ", " #sel "\n\t" \
1326 #define ___read_64bit_c0_register(source, sel, vol) \ argument
1329 __res = __read_64bit_c0_split(source, sel, vol); \
1330 else if (sel == 0) \
1341 "dmfc0\t%0, " #source ", " #sel "\n\t" \
1347 #define __read_32bit_c0_register(source, sel) \ argument
1348 ___read_32bit_c0_register(source, sel, __volatile__)
1350 #define __read_const_32bit_c0_register(source, sel) \ argument
1351 ___read_32bit_c0_register(source, sel,)
1353 #define __read_64bit_c0_register(source, sel) \ argument
1354 ___read_64bit_c0_register(source, sel, __volatile__)
1356 #define __read_const_64bit_c0_register(source, sel) \ argument
1357 ___read_64bit_c0_register(source, sel,)
1359 #define __write_32bit_c0_register(register, sel, value) \ argument
1361 if (sel == 0) \
1369 "mtc0\t%z0, " #register ", " #sel "\n\t" \
1374 #define __write_64bit_c0_register(register, sel, value) \ argument
1377 __write_64bit_c0_split(register, sel, value); \
1378 else if (sel == 0) \
1389 "dmtc0\t%z0, " #register ", " #sel "\n\t" \
1394 #define __read_ulong_c0_register(reg, sel) \ argument
1396 (unsigned long) __read_32bit_c0_register(reg, sel) : \
1397 (unsigned long) __read_64bit_c0_register(reg, sel))
1399 #define __read_const_ulong_c0_register(reg, sel) \ argument
1401 (unsigned long) __read_const_32bit_c0_register(reg, sel) : \
1402 (unsigned long) __read_const_64bit_c0_register(reg, sel))
1404 #define __write_ulong_c0_register(reg, sel, val) \ argument
1407 __write_32bit_c0_register(reg, sel, val); \
1409 __write_64bit_c0_register(reg, sel, val); \
1434 #define __read_64bit_c0_split(source, sel, vol) \ argument
1438 if (sel == 0) \
1451 "dmfc0\t%L0, " #source ", " #sel "\n\t" \
1460 #define __write_64bit_c0_split(source, sel, val) \ argument
1468 "dmtc0\t%L0, " #source ", " #sel "\n\t" \
1471 else if (sel == 0) \
1490 "dmtc0\t%L0, " #source ", " #sel "\n\t" \
1496 _ASM_MACRO_2R_1S(mfhc0, rt, rs, sel,
1497 _ASM_INSN_IF_MIPS(0x40400000 | __rt << 16 | __rs << 11 | \\sel)
1498 _ASM_INSN32_IF_MM(0x000000f4 | __rt << 21 | __rs << 16 | \\sel << 11));
1499 _ASM_MACRO_2R_1S(mthc0, rt, rd, sel,
1500 _ASM_INSN_IF_MIPS(0x40c00000 | __rt << 16 | __rd << 11 | \\sel)
1501 _ASM_INSN32_IF_MM(0x000002f4 | __rt << 21 | __rd << 16 | \\sel << 11));
1507 #define __readx_32bit_c0_register(source, sel) \ argument
1518 : "i" (sel)); \
1522 #define __writex_32bit_c0_register(register, sel, value) \ argument
1531 : "Jr" (value), "i" (sel)); \
1934 _ASM_MACRO_2R_1S(mfgc0, rt, rs, sel,
1935 _ASM_INSN_IF_MIPS(0x40600000 | __rt << 16 | __rs << 11 | \\sel)
1936 _ASM_INSN32_IF_MM(0x000004fc | __rt << 21 | __rs << 16 | \\sel << 11));
1937 _ASM_MACRO_2R_1S(dmfgc0, rt, rs, sel,
1938 _ASM_INSN_IF_MIPS(0x40600100 | __rt << 16 | __rs << 11 | \\sel)
1939 _ASM_INSN32_IF_MM(0x580004fc | __rt << 21 | __rs << 16 | \\sel << 11));
1940 _ASM_MACRO_2R_1S(mtgc0, rt, rd, sel,
1941 _ASM_INSN_IF_MIPS(0x40600200 | __rt << 16 | __rd << 11 | \\sel)
1942 _ASM_INSN32_IF_MM(0x000006fc | __rt << 21 | __rd << 16 | \\sel << 11));
1943 _ASM_MACRO_2R_1S(dmtgc0, rt, rd, sel,
1944 _ASM_INSN_IF_MIPS(0x40600300 | __rt << 16 | __rd << 11 | \\sel)
1945 _ASM_INSN32_IF_MM(0x580006fc | __rt << 21 | __rd << 16 | \\sel << 11));
1961 #define __read_32bit_gc0_register(source, sel) \ argument
1970 : "i" (sel)); \
1974 #define __read_64bit_gc0_register(source, sel) \ argument
1983 : "i" (sel)); \
1987 #define __write_32bit_gc0_register(register, sel, value) \ argument
1996 "i" (sel)); \
1999 #define __write_64bit_gc0_register(register, sel, value) \ argument
2008 "i" (sel)); \
2011 #define __read_ulong_gc0_register(reg, sel) \ argument
2013 (unsigned long) __read_32bit_gc0_register(reg, sel) : \
2014 (unsigned long) __read_64bit_gc0_register(reg, sel))
2016 #define __write_ulong_gc0_register(reg, sel, val) \ argument
2019 __write_32bit_gc0_register(reg, sel, val); \
2021 __write_64bit_gc0_register(reg, sel, val); \