Lines Matching refs:csr_rd_node
194 csr_rd_node(node, CVMX_GSERX_PHY_CTL(qlm)); in cvmx_ilk_start_interface()
199 gserx_cfg.u64 = csr_rd_node(node, CVMX_GSERX_CFG(qlm)); in cvmx_ilk_start_interface()
213 ilk_ser_cfg.u64 = csr_rd_node(node, CVMX_ILK_SER_CFG); in cvmx_ilk_start_interface()
305 ilk_txx_cfg0.u64 = csr_rd_node(node, CVMX_ILK_TXX_CFG0(interface)); in cvmx_ilk_start_interface()
306 ilk_rxx_cfg0.u64 = csr_rd_node(node, CVMX_ILK_RXX_CFG0(interface)); in cvmx_ilk_start_interface()
316 lmode0.u64 = csr_rd_node(node, CVMX_GSERX_LANE_MODE(5)); in cvmx_ilk_start_interface()
317 lmode1.u64 = csr_rd_node(node, CVMX_GSERX_LANE_MODE(7)); in cvmx_ilk_start_interface()
324 csr_rd_node(node, CVMX_ILK_TXX_CFG1(interface)); in cvmx_ilk_start_interface()
366 ilk_txx_pipe.u64 = csr_rd_node(xi.node, CVMX_ILK_TXX_PIPE(interface)); in cvmx_ilk_set_pipe()
550 csr_rd_node(node, CVMX_ILK_RXX_CFG0(interface)); in cvmx_ilk_rx_cal_conf()
563 csr_rd_node(node, CVMX_ILK_RXX_CFG0(interface)); in cvmx_ilk_rx_cal_conf()
601 ilk_rxx_cfg1.u64 = csr_rd_node(node, CVMX_ILK_RXX_CFG1(interface)); in cvmx_ilk_rx_set_hwm()
638 ilk_rxx_cfg0.u64 = csr_rd_node(node, CVMX_ILK_RXX_CFG0(interface)); in cvmx_ilk_rx_cal_ena()
641 csr_rd_node(node, CVMX_ILK_RXX_CFG0(interface)); in cvmx_ilk_rx_cal_ena()
732 csr_rd_node(node, CVMX_ILK_TXX_CFG0(interface)); in cvmx_ilk_tx_cal_conf()
745 csr_rd_node(node, CVMX_ILK_TXX_CFG0(interface)); in cvmx_ilk_tx_cal_conf()
781 ilk_txx_cfg0.u64 = csr_rd_node(node, CVMX_ILK_TXX_CFG0(interface)); in cvmx_ilk_tx_cal_ena()
784 csr_rd_node(node, CVMX_ILK_TXX_CFG0(interface)); in cvmx_ilk_tx_cal_ena()
840 ilk_rxx_cfg0.u64 = csr_rd_node(node, CVMX_ILK_RXX_CFG0(interface)); in cvmx_ilk_reg_dump_rx()
843 ilk_rxx_cfg1.u64 = csr_rd_node(node, CVMX_ILK_RXX_CFG1(interface)); in cvmx_ilk_reg_dump_rx()
846 ilk_rxx_int.u64 = csr_rd_node(node, CVMX_ILK_RXX_INT(interface)); in cvmx_ilk_reg_dump_rx()
850 ilk_rxx_jabber.u64 = csr_rd_node(node, CVMX_ILK_RXX_JABBER(interface)); in cvmx_ilk_reg_dump_rx()
856 csr_rd_node(node, CVMX_ILK_RX_LNEX_CFG(i)); in cvmx_ilk_reg_dump_rx()
863 csr_rd_node(node, CVMX_ILK_RX_LNEX_INT(i)); in cvmx_ilk_reg_dump_rx()
869 ilk_gbl_cfg.u64 = csr_rd_node(node, CVMX_ILK_GBL_CFG); in cvmx_ilk_reg_dump_rx()
872 ilk_ser_cfg.u64 = csr_rd_node(node, CVMX_ILK_SER_CFG); in cvmx_ilk_reg_dump_rx()
891 rxx_chax.u64 = csr_rd_node( in cvmx_ilk_reg_dump_rx()
923 rxx_cal_entryx.u64 = csr_rd_node( in cvmx_ilk_reg_dump_rx()
948 ilk_txx_cfg0.u64 = csr_rd_node(node, CVMX_ILK_TXX_CFG0(interface)); in cvmx_ilk_reg_dump_tx()
951 ilk_txx_cfg1.u64 = csr_rd_node(node, CVMX_ILK_TXX_CFG1(interface)); in cvmx_ilk_reg_dump_tx()
970 ilk_txx_int.u64 = csr_rd_node(node, CVMX_ILK_TXX_INT(interface)); in cvmx_ilk_reg_dump_tx()
997 txx_cal_entryx.u64 = csr_rd_node( in cvmx_ilk_reg_dump_tx()
1029 ilk_txx_cfg1.u64 = csr_rd_node(node, CVMX_ILK_TXX_CFG1(interface)); in cvmx_ilk_runtime_status()
1046 txx_cha_xonx.u64 = csr_rd_node( in cvmx_ilk_runtime_status()
1052 ilk_rxx_cfg1.u64 = csr_rd_node(node, CVMX_ILK_RXX_CFG1(interface)); in cvmx_ilk_runtime_status()
1056 ilk_rxx_int.u64 = csr_rd_node(node, CVMX_ILK_RXX_INT(interface)); in cvmx_ilk_runtime_status()
1077 rxx_cha_xonx.u64 = csr_rd_node( in cvmx_ilk_runtime_status()
1083 ilk_gbl_int.u64 = csr_rd_node(node, CVMX_ILK_GBL_INT); in cvmx_ilk_runtime_status()
1133 ilk_txx_cfg1.u64 = csr_rd_node(node, CVMX_ILK_TXX_CFG1(interface)); in cvmx_ilk_enable()
1142 csr_rd_node(node, CVMX_ILK_TXX_CFG1(interface)); in cvmx_ilk_enable()
1146 ilk_rxx_cfg0.u64 = csr_rd_node(node, CVMX_ILK_RXX_CFG0(interface)); in cvmx_ilk_enable()
1151 ilk_txx_cfg0.u64 = csr_rd_node(node, CVMX_ILK_TXX_CFG0(interface)); in cvmx_ilk_enable()
1168 ilk_rxx_cfg1.u64 = csr_rd_node(node, CVMX_ILK_RXX_CFG1(interface)); in cvmx_ilk_enable()