Lines Matching refs:interface
71 int cvmx_ilk_use_la_mode(int interface, int channel) in cvmx_ilk_use_la_mode() argument
76 if (interface >= CVMX_NUM_ILK_INTF) { in cvmx_ilk_use_la_mode()
78 interface, __func__); in cvmx_ilk_use_la_mode()
81 return cvmx_ilk_LA_mode[interface].ilk_LA_mode; in cvmx_ilk_use_la_mode()
94 int cvmx_ilk_la_mode_enable_rx_calendar(int interface) in cvmx_ilk_la_mode_enable_rx_calendar() argument
100 if (interface >= CVMX_NUM_ILK_INTF) { in cvmx_ilk_la_mode_enable_rx_calendar()
102 interface, __func__); in cvmx_ilk_la_mode_enable_rx_calendar()
105 return cvmx_ilk_LA_mode[interface].ilk_LA_mode_cal_ena; in cvmx_ilk_la_mode_enable_rx_calendar()
119 int cvmx_ilk_start_interface(int interface, unsigned short lane_mask) in cvmx_ilk_start_interface() argument
127 int node = (interface >> 4) & 0xf; in cvmx_ilk_start_interface()
129 interface &= 0xf; in cvmx_ilk_start_interface()
134 if (interface >= CVMX_NUM_ILK_INTF) in cvmx_ilk_start_interface()
143 other_intf = !interface; in cvmx_ilk_start_interface()
146 interface, __func__); in cvmx_ilk_start_interface()
153 uni_mask = lane_mask >> (interface * 4); in cvmx_ilk_start_interface()
159 (interface == 1 && lane_mask > 0xf0)) { in cvmx_ilk_start_interface()
161 interface, __func__, uni_mask); in cvmx_ilk_start_interface()
167 this_qlm = interface + CVMX_ILK_QLM_BASE(); in cvmx_ilk_start_interface()
173 debug("ILK%d: %s: qlm unavailable\n", interface, in cvmx_ilk_start_interface()
207 interface, __func__, lane_mask); in cvmx_ilk_start_interface()
223 ((interface == 0) && (lane_mask > 0xf)) ? in cvmx_ilk_start_interface()
225 (1 << interface); in cvmx_ilk_start_interface()
237 int qlm = (interface) ? 2 : 1; in cvmx_ilk_start_interface()
278 __cvmx_ilk_clear_cal((node << 4) | interface); in cvmx_ilk_start_interface()
282 if (cvmx_ilk_use_la_mode(interface, 0)) { in cvmx_ilk_start_interface()
286 ilk_txx_cfg1.u64 = csr_rd(CVMX_ILK_TXX_CFG1(interface)); in cvmx_ilk_start_interface()
287 ilk_rxx_cfg1.u64 = csr_rd(CVMX_ILK_RXX_CFG1(interface)); in cvmx_ilk_start_interface()
292 csr_wr(CVMX_ILK_TXX_CFG1(interface), ilk_txx_cfg1.u64); in cvmx_ilk_start_interface()
293 csr_wr(CVMX_ILK_RXX_CFG1(interface), ilk_rxx_cfg1.u64); in cvmx_ilk_start_interface()
294 cvmx_ilk_intf_cfg[node][interface].la_mode = in cvmx_ilk_start_interface()
297 cvmx_ilk_intf_cfg[node][interface].la_mode = in cvmx_ilk_start_interface()
302 cvmx_ilk_intf_cfg[node][interface].la_mode = 0; in cvmx_ilk_start_interface()
305 ilk_txx_cfg0.u64 = csr_rd_node(node, CVMX_ILK_TXX_CFG0(interface)); in cvmx_ilk_start_interface()
306 ilk_rxx_cfg0.u64 = csr_rd_node(node, CVMX_ILK_RXX_CFG0(interface)); in cvmx_ilk_start_interface()
309 csr_wr_node(node, CVMX_ILK_TXX_CFG0(interface), ilk_txx_cfg0.u64); in cvmx_ilk_start_interface()
310 csr_wr_node(node, CVMX_ILK_RXX_CFG0(interface), ilk_rxx_cfg0.u64); in cvmx_ilk_start_interface()
324 csr_rd_node(node, CVMX_ILK_TXX_CFG1(interface)); in cvmx_ilk_start_interface()
326 csr_wr_node(node, CVMX_ILK_TXX_CFG1(interface), in cvmx_ilk_start_interface()
334 cvmx_ilk_intf_cfg[node][interface].intf_en = 1; in cvmx_ilk_start_interface()
357 int interface = xi.interface - CVMX_ILK_GBL_BASE(); in cvmx_ilk_set_pipe() local
362 if (interface >= CVMX_NUM_ILK_INTF) in cvmx_ilk_set_pipe()
366 ilk_txx_pipe.u64 = csr_rd_node(xi.node, CVMX_ILK_TXX_PIPE(interface)); in cvmx_ilk_set_pipe()
369 csr_wr_node(xi.node, CVMX_ILK_TXX_PIPE(interface), ilk_txx_pipe.u64); in cvmx_ilk_set_pipe()
387 int cvmx_ilk_tx_set_channel(int interface, cvmx_ilk_pipe_chan_t *pch, in cvmx_ilk_tx_set_channel() argument
398 if (interface >= CVMX_NUM_ILK_INTF) in cvmx_ilk_tx_set_channel()
404 if (cvmx_ilk_use_la_mode(interface, 0)) { in cvmx_ilk_tx_set_channel()
411 csr_wr(CVMX_ILK_TXX_IDX_PMAP(interface), in cvmx_ilk_tx_set_channel()
413 csr_wr(CVMX_ILK_TXX_MEM_PMAP(interface), in cvmx_ilk_tx_set_channel()
424 csr_wr(CVMX_ILK_TXX_IDX_PMAP(interface), in cvmx_ilk_tx_set_channel()
426 csr_wr(CVMX_ILK_TXX_MEM_PMAP(interface), in cvmx_ilk_tx_set_channel()
455 int interface = xi.interface - CVMX_ILK_GBL_BASE(); in cvmx_ilk_rx_set_pknd() local
460 if (interface >= CVMX_NUM_ILK_INTF) in cvmx_ilk_rx_set_pknd()
475 cvmx_ilk_use_la_mode(interface, chpknd->chan)) { in cvmx_ilk_rx_set_pknd()
477 interface * 256 + 128 + chpknd->chan; in cvmx_ilk_rx_set_pknd()
481 ilk_rxf_idx_pmap.s.index = interface * 256 + chpknd->chan; in cvmx_ilk_rx_set_pknd()
508 int interface = intf & 0xf; in cvmx_ilk_rx_cal_conf() local
513 if (interface >= CVMX_NUM_ILK_INTF) in cvmx_ilk_rx_cal_conf()
527 if ((cvmx_ilk_use_la_mode(interface, 0) == 0) || in cvmx_ilk_rx_cal_conf()
528 (cvmx_ilk_use_la_mode(interface, 0) && in cvmx_ilk_rx_cal_conf()
529 cvmx_ilk_la_mode_enable_rx_calendar(interface))) { in cvmx_ilk_rx_cal_conf()
532 interface, i, pent[i].pipe_bpid); in cvmx_ilk_rx_cal_conf()
537 ilk_rxx_cfg0.u64 = csr_rd(CVMX_ILK_RXX_CFG0(interface)); in cvmx_ilk_rx_cal_conf()
540 if (cvmx_ilk_use_la_mode(interface, 0)) { in cvmx_ilk_rx_cal_conf()
545 csr_wr(CVMX_ILK_RXX_CFG0(interface), ilk_rxx_cfg0.u64); in cvmx_ilk_rx_cal_conf()
550 csr_rd_node(node, CVMX_ILK_RXX_CFG0(interface)); in cvmx_ilk_rx_cal_conf()
556 csr_wr_node(node, CVMX_ILK_RXX_CFG0(interface), in cvmx_ilk_rx_cal_conf()
563 csr_rd_node(node, CVMX_ILK_RXX_CFG0(interface)); in cvmx_ilk_rx_cal_conf()
566 csr_wr_node(node, CVMX_ILK_RXX_CFG0(interface), in cvmx_ilk_rx_cal_conf()
589 int interface = intf & 0xf; in cvmx_ilk_rx_set_hwm() local
594 if (interface >= CVMX_NUM_ILK_INTF) in cvmx_ilk_rx_set_hwm()
601 ilk_rxx_cfg1.u64 = csr_rd_node(node, CVMX_ILK_RXX_CFG1(interface)); in cvmx_ilk_rx_set_hwm()
603 csr_wr_node(node, CVMX_ILK_RXX_CFG1(interface), ilk_rxx_cfg1.u64); in cvmx_ilk_rx_set_hwm()
625 int interface = intf & 0xf; in cvmx_ilk_rx_cal_ena() local
630 if (interface >= CVMX_NUM_ILK_INTF) in cvmx_ilk_rx_cal_ena()
633 if (cvmx_ilk_use_la_mode(interface, 0) && in cvmx_ilk_rx_cal_ena()
634 !cvmx_ilk_la_mode_enable_rx_calendar(interface)) in cvmx_ilk_rx_cal_ena()
638 ilk_rxx_cfg0.u64 = csr_rd_node(node, CVMX_ILK_RXX_CFG0(interface)); in cvmx_ilk_rx_cal_ena()
640 csr_wr_node(node, CVMX_ILK_RXX_CFG0(interface), ilk_rxx_cfg0.u64); in cvmx_ilk_rx_cal_ena()
641 csr_rd_node(node, CVMX_ILK_RXX_CFG0(interface)); in cvmx_ilk_rx_cal_ena()
699 int interface = intf & 0xf; in cvmx_ilk_tx_cal_conf() local
704 if (interface >= CVMX_NUM_ILK_INTF) in cvmx_ilk_tx_cal_conf()
719 __cvmx_ilk_write_tx_cal_entry(interface, i, in cvmx_ilk_tx_cal_conf()
724 ilk_txx_cfg0.u64 = csr_rd(CVMX_ILK_TXX_CFG0(interface)); in cvmx_ilk_tx_cal_conf()
727 csr_wr(CVMX_ILK_TXX_CFG0(interface), ilk_txx_cfg0.u64); in cvmx_ilk_tx_cal_conf()
732 csr_rd_node(node, CVMX_ILK_TXX_CFG0(interface)); in cvmx_ilk_tx_cal_conf()
738 csr_wr_node(node, CVMX_ILK_TXX_CFG0(interface), in cvmx_ilk_tx_cal_conf()
745 csr_rd_node(node, CVMX_ILK_TXX_CFG0(interface)); in cvmx_ilk_tx_cal_conf()
749 csr_wr_node(node, CVMX_ILK_TXX_CFG0(interface), in cvmx_ilk_tx_cal_conf()
772 int interface = intf & 0xf; in cvmx_ilk_tx_cal_ena() local
777 if (interface >= CVMX_NUM_ILK_INTF) in cvmx_ilk_tx_cal_ena()
781 ilk_txx_cfg0.u64 = csr_rd_node(node, CVMX_ILK_TXX_CFG0(interface)); in cvmx_ilk_tx_cal_ena()
783 csr_wr_node(node, CVMX_ILK_TXX_CFG0(interface), ilk_txx_cfg0.u64); in cvmx_ilk_tx_cal_ena()
784 csr_rd_node(node, CVMX_ILK_TXX_CFG0(interface)); in cvmx_ilk_tx_cal_ena()
838 int interface = intf & 0xf; in cvmx_ilk_reg_dump_rx() local
840 ilk_rxx_cfg0.u64 = csr_rd_node(node, CVMX_ILK_RXX_CFG0(interface)); in cvmx_ilk_reg_dump_rx()
843 ilk_rxx_cfg1.u64 = csr_rd_node(node, CVMX_ILK_RXX_CFG1(interface)); in cvmx_ilk_reg_dump_rx()
846 ilk_rxx_int.u64 = csr_rd_node(node, CVMX_ILK_RXX_INT(interface)); in cvmx_ilk_reg_dump_rx()
848 csr_wr_node(node, CVMX_ILK_RXX_INT(interface), ilk_rxx_int.u64); in cvmx_ilk_reg_dump_rx()
850 ilk_rxx_jabber.u64 = csr_rd_node(node, CVMX_ILK_RXX_JABBER(interface)); in cvmx_ilk_reg_dump_rx()
878 ilk_rxf_idx_pmap.s.index = interface * 256; in cvmx_ilk_reg_dump_rx()
892 node, CVMX_ILK_RXX_CHAX(i, interface)); in cvmx_ilk_reg_dump_rx()
902 csr_wr(CVMX_ILK_RXX_IDX_CAL(interface), ilk_rxx_idx_cal.u64); in cvmx_ilk_reg_dump_rx()
905 csr_rd(CVMX_ILK_RXX_IDX_CAL(interface)); in cvmx_ilk_reg_dump_rx()
910 csr_rd(CVMX_ILK_RXX_MEM_CAL0(interface)); in cvmx_ilk_reg_dump_rx()
914 csr_rd(CVMX_ILK_RXX_MEM_CAL1(interface)); in cvmx_ilk_reg_dump_rx()
924 node, CVMX_ILK_RXX_CAL_ENTRYX(i, interface)); in cvmx_ilk_reg_dump_rx()
946 int interface = intf & 0xf; in cvmx_ilk_reg_dump_tx() local
948 ilk_txx_cfg0.u64 = csr_rd_node(node, CVMX_ILK_TXX_CFG0(interface)); in cvmx_ilk_reg_dump_tx()
951 ilk_txx_cfg1.u64 = csr_rd_node(node, CVMX_ILK_TXX_CFG1(interface)); in cvmx_ilk_reg_dump_tx()
955 ilk_txx_pipe.u64 = csr_rd(CVMX_ILK_TXX_PIPE(interface)); in cvmx_ilk_reg_dump_tx()
961 csr_wr(CVMX_ILK_TXX_IDX_PMAP(interface), ilk_txx_idx_pmap.u64); in cvmx_ilk_reg_dump_tx()
964 csr_rd(CVMX_ILK_TXX_MEM_PMAP(interface)); in cvmx_ilk_reg_dump_tx()
970 ilk_txx_int.u64 = csr_rd_node(node, CVMX_ILK_TXX_INT(interface)); in cvmx_ilk_reg_dump_tx()
976 csr_wr(CVMX_ILK_TXX_IDX_CAL(interface), ilk_txx_idx_cal.u64); in cvmx_ilk_reg_dump_tx()
979 csr_rd(CVMX_ILK_TXX_IDX_CAL(interface)); in cvmx_ilk_reg_dump_tx()
984 csr_rd(CVMX_ILK_TXX_MEM_CAL0(interface)); in cvmx_ilk_reg_dump_tx()
988 csr_rd(CVMX_ILK_TXX_MEM_CAL1(interface)); in cvmx_ilk_reg_dump_tx()
998 node, CVMX_ILK_TXX_CAL_ENTRYX(i, interface)); in cvmx_ilk_reg_dump_tx()
1017 void cvmx_ilk_runtime_status(int interface) in cvmx_ilk_runtime_status() argument
1027 debug("\nilk run-time status: interface: %d\n", interface); in cvmx_ilk_runtime_status()
1029 ilk_txx_cfg1.u64 = csr_rd_node(node, CVMX_ILK_TXX_CFG1(interface)); in cvmx_ilk_runtime_status()
1038 csr_rd(CVMX_ILK_TXX_FLOW_CTL0(interface)); in cvmx_ilk_runtime_status()
1047 node, CVMX_ILK_TXX_CHA_XONX(i, interface)); in cvmx_ilk_runtime_status()
1052 ilk_rxx_cfg1.u64 = csr_rd_node(node, CVMX_ILK_RXX_CFG1(interface)); in cvmx_ilk_runtime_status()
1056 ilk_rxx_int.u64 = csr_rd_node(node, CVMX_ILK_RXX_INT(interface)); in cvmx_ilk_runtime_status()
1061 csr_wr_node(node, CVMX_ILK_RXX_INT(interface), ilk_rxx_int.u64); in cvmx_ilk_runtime_status()
1065 csr_rd(CVMX_ILK_RXX_FLOW_CTL0(interface)); in cvmx_ilk_runtime_status()
1069 csr_rd(CVMX_ILK_RXX_FLOW_CTL1(interface)); in cvmx_ilk_runtime_status()
1078 node, CVMX_ILK_RXX_CHA_XONX(i, interface)); in cvmx_ilk_runtime_status()
1113 int interface = xi.interface - CVMX_ILK_GBL_BASE(); in cvmx_ilk_enable() local
1118 if (interface >= CVMX_NUM_ILK_INTF) in cvmx_ilk_enable()
1125 debug("<<<< ILK%d: Before enabling ilk\n", interface); in cvmx_ilk_enable()
1133 ilk_txx_cfg1.u64 = csr_rd_node(node, CVMX_ILK_TXX_CFG1(interface)); in cvmx_ilk_enable()
1136 if (cvmx_ilk_use_la_mode(interface, 0)) { in cvmx_ilk_enable()
1141 csr_wr_node(node, CVMX_ILK_TXX_CFG1(interface), ilk_txx_cfg1.u64); in cvmx_ilk_enable()
1142 csr_rd_node(node, CVMX_ILK_TXX_CFG1(interface)); in cvmx_ilk_enable()
1146 ilk_rxx_cfg0.u64 = csr_rd_node(node, CVMX_ILK_RXX_CFG0(interface)); in cvmx_ilk_enable()
1148 csr_wr_node(node, CVMX_ILK_RXX_CFG0(interface), ilk_rxx_cfg0.u64); in cvmx_ilk_enable()
1151 ilk_txx_cfg0.u64 = csr_rd_node(node, CVMX_ILK_TXX_CFG0(interface)); in cvmx_ilk_enable()
1153 csr_wr_node(node, CVMX_ILK_TXX_CFG0(interface), ilk_txx_cfg0.u64); in cvmx_ilk_enable()
1163 cvmx_helper_get_ipd_port((interface + CVMX_ILK_GBL_BASE()), 0)); in cvmx_ilk_enable()
1168 ilk_rxx_cfg1.u64 = csr_rd_node(node, CVMX_ILK_RXX_CFG1(interface)); in cvmx_ilk_enable()
1175 debug(">>>> ILK%d: After ILK is enabled\n", interface); in cvmx_ilk_enable()
1197 int interface = xi.interface - CVMX_ILK_GBL_BASE(); in cvmx_ilk_get_intf_ena() local
1198 return cvmx_ilk_intf_cfg[xi.node][interface].intf_en; in cvmx_ilk_get_intf_ena()