Lines Matching refs:node

36 static int find_node_from_desc(const void *fit, int node, const char *str)  in find_node_from_desc()  argument
40 if (node < 0) in find_node_from_desc()
44 for (child = fdt_first_subnode(fit, node); child >= 0; in find_node_from_desc()
77 __maybe_unused int node; in spl_fit_get_image_name() local
124 int node; in spl_fit_get_image_name() local
127 node = find_node_from_desc(ctx->fit, images, str); in spl_fit_get_image_name()
128 if (node > 0) in spl_fit_get_image_name()
129 str = fdt_get_name(ctx->fit, node, NULL); in spl_fit_get_image_name()
161 int node; in spl_fit_get_image_node() local
169 node = fdt_subnode_offset(ctx->fit, ctx->images_node, str); in spl_fit_get_image_node()
170 if (node < 0) { in spl_fit_get_image_node()
171 pr_err("cannot find image node '%s': %d\n", str, node); in spl_fit_get_image_node()
175 return node; in spl_fit_get_image_node()
213 const struct spl_fit_info *ctx, int node, in load_simple_fit() argument
235 ret = fit_image_get_phase(fit, node, &phase); in load_simple_fit()
250 if (fit_image_get_type(fit, node, &type)) in load_simple_fit()
257 fit_image_get_comp(fit, node, &image_comp); in load_simple_fit()
261 if (fit_image_get_load(fit, node, &load_addr)) { in load_simple_fit()
264 fit_get_name(fit, node, NULL)); in load_simple_fit()
270 if (!fit_image_get_data_position(fit, node, &offset)) { in load_simple_fit()
272 } else if (!fit_image_get_data_offset(fit, node, &offset)) { in load_simple_fit()
284 if (fit_image_get_data_size(fit, node, &len)) in load_simple_fit()
290 __func__, fit_get_name(fit, node, NULL)); in load_simple_fit()
316 if (fit_image_get_emb_data(fit, node, &data, &length)) { in load_simple_fit()
327 fit_get_name(fit, node, NULL)); in load_simple_fit()
328 if (!fit_image_verify_with_data(fit, node, gd_fdt_blob(), src, in load_simple_fit()
335 board_fit_image_post_process(fit, node, &src, &length); in load_simple_fit()
365 if (!fit_image_get_entry(fit, node, &entry_point)) in load_simple_fit()
372 upl_add_image(fit, node, load_addr, length); in load_simple_fit()
400 int node, ret = 0, index = 0; in spl_fit_append_fdt() local
409 node = spl_fit_get_image_node(ctx, FIT_FDT_PROP, index++); in spl_fit_append_fdt()
410 if (node < 0) { in spl_fit_append_fdt()
420 return node; in spl_fit_append_fdt()
430 ret = load_simple_fit(info, offset, ctx, node, &image_info); in spl_fit_append_fdt()
459 node = fdt_subnode_offset(ctx->fit, ctx->images_node, str); in spl_fit_append_fdt()
460 if (node < 0) { in spl_fit_append_fdt()
481 ret = load_simple_fit(info, offset, ctx, node, in spl_fit_append_fdt()
498 fit_get_name(ctx->fit, node, NULL)); in spl_fit_append_fdt()
503 fit_get_name(ctx->fit, node, NULL)); in spl_fit_append_fdt()
522 int node; in spl_fit_record_loadable() local
528 node = spl_fit_get_image_node(ctx, "loadables", index); in spl_fit_record_loadable()
532 fdt_getprop(ctx->fit, node, FIT_TYPE_PROP, NULL), in spl_fit_record_loadable()
533 fdt_getprop(ctx->fit, node, FIT_OS_PROP, NULL), in spl_fit_record_loadable()
534 fdt_getprop(ctx->fit, node, FIT_ARCH_PROP, NULL)); in spl_fit_record_loadable()
539 static int spl_fit_image_is_fpga(const void *fit, int node) in spl_fit_image_is_fpga() argument
546 type = fdt_getprop(fit, node, FIT_TYPE_PROP, NULL); in spl_fit_image_is_fpga()
627 static int spl_fit_upload_fpga(struct spl_fit_info *ctx, int node, in spl_fit_upload_fpga() argument
638 compatible = fdt_getprop(ctx->fit, node, "compatible", NULL); in spl_fit_upload_fpga()
664 int node, ret; in spl_fit_load_fpga() local
670 node = spl_fit_get_image_node(ctx, "fpga", 0); in spl_fit_load_fpga()
671 if (node < 0) in spl_fit_load_fpga()
672 return node; in spl_fit_load_fpga()
677 ret = load_simple_fit(info, offset, ctx, node, &fpga_image); in spl_fit_load_fpga()
683 return spl_fit_upload_fpga(ctx, node, &fpga_image); in spl_fit_load_fpga()
789 int node = -1; in spl_load_simple_fit() local
817 if (node < 0) in spl_load_simple_fit()
818 node = spl_fit_get_image_node(&ctx, FIT_FIRMWARE_PROP, 0); in spl_load_simple_fit()
820 if (node < 0 && IS_ENABLED(CONFIG_SPL_OS_BOOT)) in spl_load_simple_fit()
821 node = spl_fit_get_image_node(&ctx, FIT_KERNEL_PROP, 0); in spl_load_simple_fit()
823 if (node < 0) { in spl_load_simple_fit()
825 node = spl_fit_get_image_node(&ctx, "loadables", 0); in spl_load_simple_fit()
832 if (node < 0) { in spl_load_simple_fit()
834 __func__, node); in spl_load_simple_fit()
839 ret = load_simple_fit(info, offset, &ctx, node, spl_image); in spl_load_simple_fit()
847 if (!spl_fit_image_get_os(ctx.fit, node, &spl_image->os)) in spl_load_simple_fit()
862 firmware_node = node; in spl_load_simple_fit()
867 node = spl_fit_get_image_node(&ctx, "loadables", index); in spl_load_simple_fit()
868 if (node < 0) in spl_load_simple_fit()
876 if (firmware_node == node) in spl_load_simple_fit()
880 ret = load_simple_fit(info, offset, &ctx, node, &image_info); in spl_load_simple_fit()
887 if (spl_fit_image_is_fpga(ctx.fit, node)) in spl_load_simple_fit()
888 spl_fit_upload_fpga(&ctx, node, &image_info); in spl_load_simple_fit()
890 if (!spl_fit_image_get_os(ctx.fit, node, &os_type)) in spl_load_simple_fit()