Lines Matching refs:cache
11 Enable driver model for cache controllers that are found on
17 tristate "PL310 cache driver"
21 This driver is for the PL310 cache controller commonly found on
22 ARMv7(32-bit) devices. The driver configures the cache settings
26 bool "Andes L2 cache driver"
30 Support Andes L2 cache controller in AE350 platform.
32 device tree and enable L2 cache.
35 bool "Arteris Ncore cache coherent unit driver"
38 This driver is for the Arteris Ncore cache coherent unit (CCU)
39 controller. The driver initializes cache directories and coherent
43 bool "SiFive composable cache"
46 This driver is for SiFive Composable L2/L3 cache. It enables cache
47 ways of composable cache.
50 bool "SiFive private L2 cache"
53 This driver is for SiFive Private L2 cache. It configures registers