Lines Matching refs:REG8G
18 {0xf00, 0x0, 0x40001030, (OFFSET_SEL | F_SET | REG4G | REG8G)},
20 {0xf04, 0x0, 0x00000001, (OFFSET_SEL | F_SET | REG4G | REG8G)},
26 {0xf34, 0x0, 0x1f000041, (OFFSET_SEL | F_SET | REG4G | REG8G)},
77 {0x4, 0x0, 0x30010006, (F_SET | REG4G | REG8G)},
80 {0x4, 0x0, 0x30020000, (F_SET | REG4G | REG8G)},
83 {0x4, 0x0, 0x30030031, (F_SET | REG4G | REG8G)},
86 {0x4, 0x0, 0x300b0033, (F_SET | REG4G | REG8G)},
89 {0x4, 0x0, 0x30160016, (F_SET | REG4G | REG8G)},
156 {0x4, 0x0, 0x30010036, (F_SET | REG4G | REG8G)},
159 {0x4, 0x0, 0x3002001b, (F_SET | REG4G | REG8G)},
162 {0x4, 0x0, 0x30030031, (F_SET | REG4G | REG8G)},
166 {0x4, 0x0, 0x300b0036, (F_SET | REG8G)},
169 {0x4, 0x0, 0x30160016, (F_SET | REG4G | REG8G)},
179 {0x330, 0x0, 0x09313fff, (F_SET | REG4G | REG8G)},
181 {0x508, 0x0, 0x00000033, (F_SET | REG4G | REG8G)},
231 mask = REG8G; in ddrcsr_boot()