Lines Matching refs:dm_i2c_reg_write
47 dm_i2c_reg_write(chip1, ANX9804_RST_CTRL_REG, 1); in anx9804_init()
49 dm_i2c_reg_write(chip1, ANX9804_RST_CTRL_REG, 0); in anx9804_init()
52 dm_i2c_reg_write(chip1, ANX9804_POWERD_CTRL_REG, 0); in anx9804_init()
62 dm_i2c_reg_write(chip0, ANX9804_SYS_CTRL2_REG, c); in anx9804_init()
72 dm_i2c_reg_write(chip1, ANX9804_VID_CTRL2_REG, colordepth); in anx9804_init()
75 dm_i2c_reg_write(chip0, ANX9804_PLL_CTRL_REG, 0x07); in anx9804_init()
76 dm_i2c_reg_write(chip1, ANX9804_PLL_FILTER_CTRL3, 0x19); in anx9804_init()
77 dm_i2c_reg_write(chip1, ANX9804_PLL_CTRL3, 0xd9); in anx9804_init()
78 dm_i2c_reg_write(chip1, ANX9804_RST_CTRL2_REG, ANX9804_RST_CTRL2_AC_MODE); in anx9804_init()
79 dm_i2c_reg_write(chip1, ANX9804_ANALOG_DEBUG_REG1, 0xf0); in anx9804_init()
80 dm_i2c_reg_write(chip1, ANX9804_ANALOG_DEBUG_REG3, 0x99); in anx9804_init()
81 dm_i2c_reg_write(chip1, ANX9804_PLL_FILTER_CTRL1, 0x7b); in anx9804_init()
82 dm_i2c_reg_write(chip0, ANX9804_LINK_DEBUG_REG, 0x30); in anx9804_init()
83 dm_i2c_reg_write(chip1, ANX9804_PLL_FILTER_CTRL, 0x06); in anx9804_init()
86 dm_i2c_reg_write(chip0, ANX9804_SYS_CTRL3_REG, in anx9804_init()
90 dm_i2c_reg_write(chip0, ANX9804_ANALOG_POWER_DOWN_REG, 0x00); in anx9804_init()
91 dm_i2c_reg_write(chip0, ANX9804_TRAINING_LANE0_SET_REG, 0x00); in anx9804_init()
92 dm_i2c_reg_write(chip0, ANX9804_TRAINING_LANE1_SET_REG, 0x00); in anx9804_init()
93 dm_i2c_reg_write(chip0, ANX9804_TRAINING_LANE2_SET_REG, 0x00); in anx9804_init()
94 dm_i2c_reg_write(chip0, ANX9804_TRAINING_LANE3_SET_REG, 0x00); in anx9804_init()
97 dm_i2c_reg_write(chip1, ANX9804_RST_CTRL2_REG, in anx9804_init()
99 dm_i2c_reg_write(chip1, ANX9804_RST_CTRL2_REG, in anx9804_init()
103 dm_i2c_reg_write(chip1, ANX9804_POWERD_CTRL_REG, ANX9804_POWERD_AUDIO); in anx9804_init()
104 dm_i2c_reg_write(chip0, ANX9804_HDCP_CONTROL_0_REG, 0x00); in anx9804_init()
105 dm_i2c_reg_write(chip0, 0xa7, 0x00); in anx9804_init()
108 dm_i2c_reg_write(chip0, ANX9804_LINK_BW_SET_REG, data_rate); in anx9804_init()
109 dm_i2c_reg_write(chip0, ANX9804_LANE_COUNT_SET_REG, lanes); in anx9804_init()
112 dm_i2c_reg_write(chip0, ANX9804_LINK_TRAINING_CTRL_REG, in anx9804_init()
128 dm_i2c_reg_write(chip1, ANX9804_VID_CTRL1_REG, in anx9804_init()
131 dm_i2c_reg_write(chip0, ANX9804_SYS_CTRL3_REG, in anx9804_init()